DRV8353: DRV8353 some doubt when reading the datasheet

user6360875

Intellectual 280 points

Part Number: DRV8353

Hi TI

Now planning to use DRV8353,but when reading the datasheet ,some question occurred

pls help me

1: in the datasheet Page68

Ivcp is dependent on the VM pin voltage, but I didn't find some parametre of Ivcp value ?

2: Trapezoidal 120° Commutation: IVCP/VGLS > Qg × ƒPWM

while Sinusoidal 180° Commutation: IVCP/VGLS > 3 × Qg × ƒPWM

the above formula ， how to get it ??

and also whether or not IVCP/VGLS is the mean value of the Tpwm ？

3: Page 70

when calculate the Pvcp ,PVCP = IVCP × (Vvm + Vvdrain) ,why add the Vvdrain ??

4：about the PCB Layout

does it matter when the GHA-SHA and GLA signal flow through the sense resisitor ? does it interfere the small current sense signal?

pls help me thanks a lot

over 3 years ago

0 Andrew Liu over 3 years ago

TI__Mastermind 18981 points

Hello,

We will aim to give you a response on this by end of this week

Best Regards,
Andrew

0 Andrew Liu over 3 years ago

TI__Mastermind 18981 points

Hello,

Thanks for your patience - please see below responses, and let me know if it resolves your question. Thanks!

I_VCP and I_VGLS
1. these are the 'gate overdrive voltage' supplies for the DRV IC covering HS and LS pre-drivers, respectively.
2. because both of these regulators depend on VM voltage as main supply input, their voltage and current output capability scale with VM as well
3. below datasheet section in Electrical Char table will identify the expected performance
Explanation for Gate drive current load estimation formula
1. Sharing Smart Gate Drive App Note: https://www.ti.com/lit/slva714
2. this section in the app note will explain the background on the formula
  1. in summary, there is a certain amount of charge needed to turn on a single MOSFET (gate charge Qg)
  2. f_PWM is the frequency at which this gate charge happens
  3. this varies a bit with commutation control method, since that will decide when each of these FETs is switching.
    1. for example, in Sine commutation, 3x
P_VCP and P_VGLS calculations
1. I may need to look into this further.
PCB Layout
1. there shouldn't be any concerns with the gate-drive signals (GHx, GLx, SHx) being near/underneath the sense resistor

Best Regards,
Andrew

0 user6360875 over 3 years ago in reply to Andrew Liu

Intellectual 280 points

thanks for your reply!

1: I_VCP and I_VGLS

maybe I got that , but one question is why : the VM Voltahe rise , so does the IVCP&I_VGLS rise ？

is that the regulator output load is equal to a RC , R is about some ON resistor , C is about some parastic capacitor，as same as charge a capacitor ??

2: I got that

3：pls help further

4： the sensor resistor is the very very small signal ,(GHx, GLx, SHx) is the big transient signal, why not ？

pls

0 Andrew Liu over 3 years ago in reply to user6360875

TI__Mastermind 18981 points

Hello,

Expanding on a few of the answers:

The output capability of I_VCP and I_VGLS capability* rise with higher VM because of how the charge pump circuit works
1. this app note may explain further:https://www.ti.com/lit/an/slva398a/slva398a.pdf
Schematic/Layout resources:

Best Regards,
Andrew

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DRV8353: DRV8353 some doubt when reading the datasheet