Hi,
Could you provide correct timing diagram?
Enablen is active low but it seems to be active high in Figure. 1
Now when STEP is low, device drives output.
Need to compare timing diagram and board.
Thanks.
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Hi,
Could you provide correct timing diagram?
Enablen is active low but it seems to be active high in Figure. 1
Now when STEP is low, device drives output.
Need to compare timing diagram and board.
Thanks.
Hey David,
The outputs do transition at the rising edge of the STEP signal.
I believe you are correct about nENABLE being wrong, it should be LOW when driving a motor.
This chip is quite old (released 2011), if this is a new project design you may want to consider using a more modern driver such as the DRV8424.
Regards,
Jacob Thompson