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DRV2510-Q1: IC simulate with OrCAD

Part Number: DRV2510-Q1
Other Parts Discussed in Thread: TAS5421-Q1

Hi Team,

The customer has following question needs your help

I have a question when i want to simulate DRV2510-Q1, because the pspice module is different from its in datasheet(such as pin definition).

So I don't know how to setup. especially, D0, D3-D7, MUTE, SDZ.

Please help to give a suggestion about how to simulate this IC.

Best Regards,

Susan Ren

  • Hi Susan,

    Our TI haptics experts has just returned from international travel, please allow at least 48 hours for a response.

    Thank you for your patience.

  • Is there any update?

  • Hi Susan, 

    I apologize for the delay, we will have our haptics expert Arthur Brown comment as soon as he can.

    Kind Regards,

  • Hi Susan,

    I looked at the model and seems the model is simplifying the readings in register 0x03 and mapping them to a dedicated pin

    Basically when you write a command via I2C, the register values that control some functions such as gain or threshold levels are set to either 1 and 0.

    In this model , each bit is written via a dedicated pin. So you can write 0 ( ground the pin) or 1 ( Connect to supply voltage) for each bit through these pins. 

    For example setting  D0 to 0 or 1 selects one of the 2 internal clk generators with f=400kHz or 500KHz . Probably 2 clk generators are Muxed and D0 controls which one is selected and used.  So it sets the Oscillator frequency.

    With same token, D3D4D5  can provide 8 options and depending on the 0 or 1 you  apply it will connect one of the 8 choices ( some defined reference voltages) to a specific node. So  if you apply 000 to these pins , it will select a 5V refence voltage and if you apply 111 ( all Hi)  to these pins, then a very large voltage source  is going to be used so you never hit the limit and thus seems protection is disabled.  So D3-D5 sets Speaker Guard clipping level

    Gain is set using D6D7 which gives you 4 options . for example, If you connect GND and VDD to them respectively,  you are writing 01 to the registers and internally it will select the FB network such that results in gain of 26dB. This usually is done by an array of FB resistors and parallel switches along with one fix resistor to change the ratio and thus gain.

    Since the model is encrypted i can not see the actual implementation but I am sure it is implemented similar to what I described above.

    Let me know if you have any questions.

    Kind Regards,

    Arash

  • Hi Arash,

    Thank you very much for your detailed explanation.

    I will try again later and because the model is encrypted, so I want to use TAS5421-Q1 as an alternative.

    Best Regards.

    Edison