DRV8320: About nFAULT signal delay

teritama

Expert 2165 points

Part Number: DRV8320

Hi team,

when our customer control this device by ENABLE L:disable to H:Enable, after this device enable, nFAULT level keep L

for 0.4ms.

In datasheet figure 43 or 44, it seems nFAULT keep H for 0.4ms when ENABLE H to L.

Is this the same reason?

And it is said that this reason is come from charge pomp and digital core start-up in this article.:https://e2e.ti.com/support/motor-drivers-group/motor-drivers/f/motor-drivers-forum/942458/drv8320-nfault-behavior-with-enable-pin-and-behavior-after-undervoltage-fault?tisearch=e2e-sitesearch&keymatch=drv8320#

Is this same?

Best regards,

teritama

over 2 years ago

0 Akshay Rajeev Menon over 2 years ago

TI__Mastermind 23506 points

Hey Teritama,

I will aim to provide feedback next week.

Best,

Akshay

+1 Akshay Rajeev Menon over 2 years ago in reply to Akshay Rajeev Menon

TI__Mastermind 23506 points

Hey Teritama,

Yes you understanding seems correct. As Adam mentioned, "the nFAULT will go low while the charge pump and digital core start-up. Once ready, the nFAULT will go HIGH once again to signal that the device is ready."

Best,

Akshay

0 Akshay Rajeev Menon over 2 years ago in reply to Akshay Rajeev Menon

TI__Mastermind 23506 points

Hey Teritama,

Please click the resolve button to let us know if this issue has been resolved.

Closing the thread for now. For further questions feel free to reopen the thread.

Best,

Akshay

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DRV8320: About nFAULT signal delay