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BOOSTXL-DRV8301: Shunt Current Measurement and ADC samples

Part Number: BOOSTXL-DRV8301
Other Parts Discussed in Thread: MOTORWARE

How a c2000 uC is synching the ADC samples to make sure it is sampling when the low side fet is on? I am following lab guides and foc guides. There is no mention of how adc is synching with the low side fet turn on. How is this done, I can't understand. 

Here are the codes in Lab01b in Motorware for BoostXL-DRV8301 and 28027F uC.

// acknowledge the ADC interrupt
HAL_acqAdcInt(halHandle,ADC_IntNumber_1);

// convert the ADC data
HAL_readAdcData(halHandle,&gAdcData);


static inline void HAL_readAdcData(HAL_Handle handle,HAL_AdcData_t *pAdcData)
{
HAL_Obj *obj = (HAL_Obj *)handle;

_iq value;
_iq current_sf = HAL_getCurrentScaleFactor(handle);
_iq voltage_sf = HAL_getVoltageScaleFactor(handle);


// convert current A
// sample the first sample twice due to errata sprz342f, ignore the first sample
value = (_iq)ADC_readResult(obj->adcHandle,ADC_ResultNumber_1);
value = _IQ12mpy(value,current_sf) - obj->adcBias.I.value[0]; // divide by 2^numAdcBits = 2^12
pAdcData->I.value[0] = value;

  • Hi Alihossein,

    Thanks for your question!

    Today is a TI holiday, but we will aim to provide a response by the end of the week.

    Regards,

    Anthony

  • I think I have figured it out: Please comment if this is exactly what is happening

    1- PWM1 is set to up down counter

    2- EPM1A is going high when the counter = compA and is going high. It goes low when counter=compA and it is counting down

    3- EPWM1 SoCA is configured to go high when the counter reaches zero. It generates an interrupt on the third event. This ensures that the mainISR calculations will be done before updating the new parameters. 

    4- ADC is configured to use SoCA of EPWM1 as the start of the conversion signal. 

    5- ADC issues an interrupt when it is done with the conversion of the bus voltage 

    6- mainISR is performed with ADC interrupt and calculates all the stuff in three period of PWM

  • Thanks Alihossein,

    I will need to look into the code to double check to make sure your understanding is correct. I will aim to look into this and get back to you early next week. 

    Regards,

    Anthony 

  • Hi Alihossein,

    I looked over the code last night for some time and I think you are correct, but it is taking me a while since I am not very familiar with the code. I know for sure that it has to do with the fact of the ISR being triggered at a time when the low side FET is on, but I am trying to dig through the EPWM initialization code in the hal.c file to better understand what is going on. 

    Regards,

    Anthony Lodi

  • Hi Alihossein,

    I apologize for the long delay in getting back to you! I reached out to a team member who was more knowledgeable and he said that it looks like your understanding is correct. He said that the PWM SOC (TCNT = 0) is used to trigger the ADC and generates ADC End Of Conversion (EOC) that issues the interrupt for the ISR.

    Regards,

    Anthony Lodi