DRV8323: Gate ringing question

biter terbi

Part Number: DRV8323
Other Parts Discussed in Thread: CSD88599Q5DC

Hello TI experts, I was measuring both high-side gate and low-side and found ringing in both of them.

Given the following parasitic equivalent circuit you can see that when the high side fet is closed, some current can flow through the low-side Cgd parasitic capacitor.

This would induce a voltage in the low-side gate and proceed to cause a shoot through

But the phenomenon I'm experiencing is different. The induced voltage in the low side gate has an opposite polarity to the high side Vgs.

(Red is high side, blue is low side)

So I don't really understand where this ringing is coming from, have you ever seen something like this before?

Thank you very much!

over 2 years ago

0 Alicia Rosenberger over 2 years ago

TI__Genius 13630 points

Hi Biter,

Thank you for posting to the Motor Drivers forum!

Unfortunately, I did not get to look at this today, but I will get back to you with a response shortly.

Best,

~Alicia

0 Alicia Rosenberger over 2 years ago

TI__Genius 13630 points

Hi Biter,

What is your IDRIVE setting? It could be that it is set too high/incorrectly.

The following FAQ, Selecting the Best IDRIVE setting and Why this is Essential, explains how to make sure that your IDRIVE setting is correct

Best,

~Alicia

0 biter terbi over 2 years ago in reply to Alicia Rosenberger

Prodigy 160 points

Hello!
The IDRIVE is set to 60/120mA

0 Alicia Rosenberger over 2 years ago in reply to biter terbi

TI__Genius 13630 points

Hi Biter,

What is your target rise and fall time for your MOSFET? Also, do you know what the gate-to-drain charge on the MOSFET is?

Best,

~Alicia

0 biter terbi over 2 years ago in reply to Alicia Rosenberger

Prodigy 160 points

The Qgd is 7nC, I don't really have a rise time target, but I wouldn't go too low on the slew rate, otherwise the fets could get really warm.
I'm using TI's CSD88599Q5DC half bridge.
What IDRIVE setting would you use for this?
Thank you.

0 Alicia Rosenberger over 2 years ago in reply to biter terbi

TI__Genius 13630 points

Hi Biter,

The IDRIVE setting would depend on what kind of rise/fall time is needed for your system as well as what your slew rate is. Section 1.4 Simple Slew-Rate Calculation in the App Note, Understanding Smart Gate Drive, describes how to approximate your slew rate given your Qgd and average Isource. Section 1.5.1 Peak Gate Drive Current of Understanding Smart Gate Drive describes how to calculate a rise/fall time given Qgd and the peak source/sink current, respectively.

Section 9.2.1.2.2 IDRIVE Configuration of the datasheet shows an example of how to use Qgd and the desired rise/fall time to calculate IDRIVE.

Selecting the Best IDRIVE setting and Why this is Essential details some general do's and don'ts when it comes to selecting an IDRIVE to use for your system.

Best,

~Alicia

0 biter terbi over 2 years ago in reply to Alicia Rosenberger

Prodigy 160 points

Alicia.

Thank you for your answers, I'll be implementing them shortly.

Regarding my first question, is the negative spike in the low-side gate a common symptom of ringing?

Thank you!

+1 Alicia Rosenberger over 2 years ago in reply to biter terbi

TI__Genius 13630 points

Hi Biter,

To answer your first question, as the low-side gate switches from high to low, in the case of ringing, overshooting can occur which would result in the "negative spike" that you are seeing before it eventually returns to its steady-state.

Best,

~Alicia

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DRV8323: Gate ringing question