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DRV8243-Q1: Question on status register

Scarlett Cao
Expert 4000 points
Part Number: DRV8243-Q1

Hi Morita-san,

I'd like to follow up the discussion on this thread:

In EN/PH mode, during ON state customer create a load short fault, The data readback for STATUS2 03h is 0xE480, indicating FAULT=1 and OCP=1. This is correct behavior.

The question is,

When remove the load short fault (no OCP) and change to off stage (standby mode), the status is open load. Why during open load status OLP_CMP bit is not set? And data readback still 0XE480? 

Thanks 

Scarlett

  • 0
    TI__Guru 55605 points

    Scarlett,

    I am not exactly following this case.  There is no motor load at all?  Just a wire is used to short the outputs and wire is connected between output and GND to cause an OCP?

    Is the question why doesn't open-load fault occur after shorting wire is removed (no motor)?

    Regards,

    Ryan

  • 0 in reply to Ryan Kehr
    TI__Expert 4000 points

    Hi Ryan,

    Yes, there's no motor at all. Just a wire to short the outputs to create an OCP. The question is why doesn't open-load fault occur after shorting wire is removed (no motor)?

    Thank you

    Scarlett

  • 0 in reply to Scarlett Cao
    TI__Guru 55605 points

    Scarlett,

    OK.  After the OCP, customer must first issue a CLR_FLT command to clear out the fault register.  After this command, OCP readback should be clear.  

    Then, in the standby state, customer will have to enable off-state diagnostics to check for open-load condition.  It does not happen automatically.

    Regards,

    Ryan