Hi team,
My customer find that they tested the tpd of out and in is 41us which is far beyond the tpd of 1us in the datasheet .Could u kindly help to explain what is the possible reason? And will the tpd affect the normal work of the chips? Thanks!
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Hi team,
My customer find that they tested the tpd of out and in is 41us which is far beyond the tpd of 1us in the datasheet .Could u kindly help to explain what is the possible reason? And will the tpd affect the normal work of the chips? Thanks!
Hi Zoey,
Can you provide more information? Do all units tested have this longer tpd? Did customer capture any waveforms?
Regards,
Pablo Armet
Hi pablo,
they found the delay in all the units. The scope is as below and the CH1 is in and CH3 is out.
Hi Zoey,
Thank you for the waveform and information. What is the value of IN1 and IN2? Can you provide the exact procedure from power up to enabling the output.
Regards,
Pablo Armet
Zoey,
If the inputs are BOTH at "0" and then one input transitions to the HIGH state (logical "1"), then there is a twake (specified in datasheet as 250us) time before the outputs are active as the part is probably in the SLEEP state if both inputs were "0" for >1ms.
That would explain what is happening here. If any output is non-zero, then tpd should be <1us on the transition.
Regards,
Ryan