Hi Team,
ULS_GATE:
The motor cannot be started when the PWM duty ratio is lower than 20.
Attach the circuit diagram
Could you help to check it?
Best Regards,
Annie
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Hi Team,
ULS_GATE:
The motor cannot be started when the PWM duty ratio is lower than 20.
Attach the circuit diagram
Could you help to check it?
Best Regards,
Annie
Hi Annie,
I will need sometime to look into this issue. I will reach out to you by Friday at the latest.
Regards,
Joshua
Hi Annie,
The schematic image is a little burry, could you provide a clearer version of the image?
ULS_GATE:
Was there meant to be a capture linked after this comment, like with the UHS-GATE: ?
Thank you,
Joshua
Hi Joshua,
Hall sensor input is normal. The DRV8307 chip has been replaced, and the waveform is consistent. The waveform is the same after the PCB has been changed several times.
Regards,
Annie
Hi Annie,
Thank you for the images, I will look them over and get you a response by next Thursday at the latest.
Regards,
Joshua
Hi Annie,
Does the FAULTn pin go low when trying to drive the motor below 20% duty ratio?
There seems to be a spike on the high side gate signal before the gate is turned on. Could a capture containing xHSG, the phase voltage, and xLSG be provided?
In the schematic VM seems does not have a bulk capacitance of 47uF or larger as recommended in the datasheet, is the value for C7 greater than 47uF?
Regards,
Joshua
Hi Annie,
Do you still require further assistance on this?
Please help mark the thread as resolved if there are no further questions. Thanks.
Best Regards,
Andrew