Hi support team.
My question is regarding Q1 and D8 in below EVM circuit.
What is the role of D8 and Q1?
It would be helpful if you could tell me how it works.
Best regards,
Higa
Hi Higa-san,
See Section 4 and 4.1 of this Application Report on reverse polarity protection (https://www.ti.com/lit/an/slva835a/slva835a.pdf) for a full explanation.
In summary, if VBAT and PGND are connected correctly, the base of Q1 is grounded and the transistor is off. D8 prevents current from going into the BJT, and current flows through the nMOSFET and connects VBAT to VM. Note that the nMOSFET can turn on because its gate is connected to VCP, so VGS > Vth.
If power is connected in reverse, PGND becomes higher than VBAT, so the base-emitter voltage of Q1 becomes positive, and Q1 conducts between its collector and emitter. This connects the gate of the nMOSFET through Q1 and D8 to VBAT (which is ground in reverse polarity conditions), turning it off and protecting the system.
This circuitry is required to use an nMOSFET over a pMOSFET at the supply, which is preferred because of its lower loss due to lower Rdson.
Best,
Hong
