This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8243-Q1: Motor Driver Questions

Part Number: DRV8243-Q1

Hey Forum,

I have a couple questions about configuring and what to expect when operating in HW Variant PWM Mode on the Motor Driver IC mentioned above.

1. Assuming the motor driver is in PWM mode and active (DRVOFF = 0 and nSLEEP = 1), when both IN1 and IN2 are low-level logic, the voltages of OUT1 and OUT2 both high and therefore are the supply voltage from VM through the high-side FETs (minus source-to-drain voltage in HS FET). However, I don’t quite seem to understand the concept of the high-side recirculation because it stipulates current flow through the load (DC motor) connecting the two outputs from OUT1 to OUT2 or vice versa when both IN1 and 2 are low. How can there be any current between OUT1 and OUT2 through the motor in this case if there is no voltage drop between OUT1 and OUT2?

2. The specs mention a PWM frequency rate up to 25kHz from DC. Is 25kHz the frequency at which the Motor driver IC will continuously sample any incoming pulses from IN1, IN2, nSLEEP, etc when active? Or does the sample rate of the IC vary depending on some configurations on the IC?

Thank you!

James