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DRV8714-Q1: Specification of DRVOFF_NFLT

rui saito
Prodigy 250 points
Part Number: DRV8714-Q1
Hi Team.
Please tell me two points about DRVOFF_NFLT
　・Time from when DRVOFF_NFLT is set to Lo until gate output possible?
　・If a gate drive instruction is received via SPI communication while DRVOFF_NFLT is Hi,
　　will the gate be driven if DRVOFF_NFLT becomes Lo afterwards?
Best Regards,
Saito
  • +1
    TI__Mastermind 45075 points

    Hi,

    Thank you for your question.

    -When DRVOFF-NFLT input get low, gate drive output can react immediately. DRVOFF logic delay should be less than 1us.

    -DRVOFF-NFLT =high makes gate drive pull down (turn off output) even if SPI command is trying to turn on. Please refer datasheet as follows.

    regards

    Shinya Morita