Hello,
Here is a question from my customer:
when IN1 and IN2 input the same PWM signal, the GL1 and GL2 outputs have different time delay. The gap is about 1uS when the driver source current is 12mA, and it can be fixed with the reducing the current to 7mA. So could you check what cause the gap between the 2 gate driver and how to avoid it. Thanks!
Tom Li
Hi,
Thank you for your questions.
tPD for GL is 300ns typ. Therefore GL should not have gap such a 1us from INx toggle.
However, if your case has High side toggle before GL toggle like bellow left case, many factor could impact timing before GL starts. External FET, load on GH/GL pin etc. It could cause gap between GL1 and GL2 starts.
regards
Shinya Morita
