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DRV8818: The enable pin is pulled low

Part Number: DRV8818

Hi Team,

Customer pulls the ENABLE pin of DRV8818 low in their circuit design. After powered up, when testing the VM (24V) and ENABLE pin power sequencing, the ENABLE pin was found to be pulled high to 1.5 V for 2s and then pulled low for 160s, then pulled high to 3.3 V. The motor does not operate for the duration of the time when EN is pulled low. The customer is wondering if there is any possibility of chip damage at this time?

When the ENABLE pin voltage is 0,  the VM pin voltage is still 22.5 V during powering down. And a large 100-UF capacitance on the VM pin will slowly power down. Will there be a risk of damage to the chip in this case?

Could you help check this case? Thanks.

Best Regards,

Cherry

  • Hi Cherry,

    The DRV8818 ENABLEn pin will disable device outputs when logic high and enable outputs when logic low. The ENABLEn pin has a weak pull-up resistor to VCC. There should be no risk of damage as long as the enable pin voltage does not exceed the VCC supply. 

     It is more commonly recommended to put the device into sleep mode to disable the outputs. The pull-up and pull-down resistors are 1MOhm to limit parasitic capacitance and reduce noise. 

    What is the use case for power sequencing the enable pin?

    Was the device damaged or is this a general inquiry about the safety of the device?

    Best,

    David

  • Hi David,

    Thank you for the support.

    Was the device damaged or is this a general inquiry about the safety of the device?

    It has been damaged, all 4 bad parts are MOS tube damage with 1 square millimeter missing on chip surface. 

    Thanks and regards,

    Cherry

  • Hi Cherry,

    It is possible that the logic level inputs are not high enough to disable the device. 

    What is the VCC supplied?

    Please check the logic power supply, VCC recommended min and max values and how they affect the logic level inputs, VIL and VIH.

    Best,

    David