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MCT8316Z: Unable to Read or Write registers using SPI in "SPI variant of MCT8316Z"

Part Number: MCT8316Z

I'm using STM32G491VETX micro controller as master and MCT8316ZR as slave. These are the configurations I used,

void MX_SPI1_Init(void)
{

hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_HARD_OUTPUT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_64;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 7;
hspi1.Init.CRCLength = SPI_CRC_LENGTH_DATASIZE;
hspi1.Init.NSSPMode = SPI_NSS_PULSE_ENABLE;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}

}

void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
{

GPIO_InitTypeDef GPIO_InitStruct = {0};
if(spiHandle->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */

/* USER CODE END SPI1_MspInit 0 */
/* SPI1 clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();

__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA4 ------> SPI1_NSS
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

GPIO_InitStruct.Pin = GPIO_PIN_4;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
GPIO_InitStruct.Alternate = GPIO_AF5_SPI1;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);

/* USER CODE BEGIN SPI1_MspInit 1 */

/* USER CODE END SPI1_MspInit 1 */
}
}

I'm unable to read or write registers. On using this code ,

HAL_GPIO_WritePin(DRV1_OFF_GPIO_Port, DRV1_OFF_Pin, GPIO_PIN_RESET);
HAL_GPIO_WritePin(DRV1_SLEEP_Port, DRV1_SLEEP_Pin, GPIO_PIN_SET);
uint8_t TxData[2] = {0x13,0x01};
uint8_t RxData[2] = {0,0};
//
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_RESET);
HAL_StatusTypeDef Txstatus = HAL_SPI_TransmitReceive(&hspi1, TxData, RxData, 2, HAL_MAX_DELAY);
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_4, GPIO_PIN_SET);

I tried changing the motor direction but nothing happened. I checked the SPI lines in oscilloscope where I can clearly see the data I transmitted. is there anything i'm missing to communicate from the micro controller??

  • Hi 

    I have tried by adding external resistor 5.1k as pull up value for SDO pin. But same issue, not able to communicate with SPI.

    Kindly let me know what I'm missing here.

    Thanks in advance

    Abu

  • Hi Abu,

    I will look into this and update you by this week end.

    Thanks and Best Regards,

    Venkatadri S

  • Hi Venkatadri,
               can you please provide any update regarding the issue

  • Hi  Abu,

    Sorry for keeping it open, I need some time to understand your code. Alternatively, I will also look for some document for you to compare what you have done. kindly wait for 2 or 3 days I will get back to you.  The datasheet will have some details, if that is still not helping, I will look into some examples for you.

    Thanks and Best Regards,

    Venkatadri S

  • Hi Abu,

    SPI mode should be as per 4th line item. Please check on the oscilloscope when host is rolling out the data?

    Please verify highlighted lines and check if it is compatible.

    A valid frame must meet the following conditions:

    The SCLK pin should be low when the nSCS pin transitions from high to low and from low to high.

    • The nSCS pin should be pulled high for at least 400 ns between words.

    • When the nSCS pin is pulled high, any signals at the SCLK and SDI pins are ignored and the SDO pin is placed in the Hi-Z state.

    • Data is captured on the falling edge of the SCLK pin and data is propagated on the rising edge of the SCLK pin.

    • The most significant bit (MSB) is shifted in and out first.

    • A full 16 SCLK cycles must occur for transaction to be valid.

    • If the data word sent to the SDI pin is less than or more than 16 bits, a frame error occurs and the data word is ignored.

    • For a write command, the existing data in the register being written to is shifted out on the SDO pin following the 8-bit status data.

    Thanks and Best Regards,

    Venkatadri S