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DRV3901-Q1: Facing SPI communication error

Part Number: DRV3901-Q1

Tool/software:

When we are trying to read data(STATUS0 (add : 0x01) from DRV3901-Q1 for pyrofuse control, we are getting SPI Error frame(0xBF).





In our HW 5.6k resister is connected to NADN_FAULT.

MCU SPI configuration details:
MCU clock :1 MHZ
CPOL = 0, CPHA = 1

  • HI Manish,

    Thanks for the question. From the waveform it looks like NAD_ERR is happening.

    Can you please let me know what is the status of PVDD. Also can you please share the schematics of the board to understand what can cause the NAD_ERR in the system.

    Thanks,

    Ibinu

  • Hi Manish,

    Thanks for confirming the details.

    NAD_ERR comes up when the device is unable to identify the node address ( due to resistor not connected or out of range).

    I have couple of follow up questions

    1. Can you confirm the device top side marking of the device.

    2. Wat is the time difference provided after the power supplies are settled before the SPI signals are given.

    3. Please confirm R89120 is present in the hardware and is 5.6k.

    Can we try the following steps after this

    1. Issue a broadcast command with the RE_INIT_NAD bit asserted(using CMD2)

    2. Read back STATUS0 --> See if the NAD_ERR persists

    3. If the NAD_ERR persists after step 2 perform NAD_RECOVERY

    NAD_RECOVERY – Issue the following commands to force the NAD address:
    a. Issue a broadcast command with NAD_OVERRIDE bit set with intended NAD address. The device with NAD_ERR picks up this command and assigns itself the commanded NAD address.
    b. Follow up with a broadcast command with NAD_OVERRIDE bit cleared. Response will include NAD_ERR and previous command content (command confirmation). NAD_ERR should be cleared.
    c. Cycle back to STATUS0_READ.

    The steps I mentioned above is detailed in "8.2.4 Initialization Setup" section of the datasheet.

    Thanks,

    Ibinu