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DRV8353: Faulty current sensing amplification on one channel only

Part Number: DRV8353

Tool/software:

We are using the DRV8353HMRTAT chip in our module.  We are running a 48v motor using an H bridge and 2 of the phases of the drive chip.  We have the control set to 6 x PWM.  When running clockwise we have the INHA and INLA running a complimentary PWM.  On the other phase we we have INHB low and INLB high.  The shunt resistors are below the low side gate and ground.  So when we are running clockwise the flow path is from the GHA gate to the GLB gate through the motor and hence we are able to read current using the Shunt 2 circuit.   When operating counter clockwise this is all reversed and we are able to read the current through the Shunt 1 circuit.

We are using a hard wired gain setting to the GAIN pin, tied to ground so gives a 5:1 gain.

We have had a problem that on some of our modules we get incorrect readings for the Shunt 1 current reading.  We have probed the boards and the voltage across SPx and SNx is exactly as we expect for the current which is flowing.  For Shunt 2 the SOB reading is exactly 5 times the SPB - SNB  as we expect.   But for shunt 1 the SOA reading is no where near this.  It is closer to 1.5:1 times the SPA-SNA.

As we are only able to set one GAIN for the chip it seems pretty conclusive there is a problem with the chip.

The majority of modules do not have this issue, but we do have several which do.  And it is always the Shunt1 output which is faulty.   On the faulty modules we can swap out the chip and then everything is fine.  If we re-install the "Faulty" chip, the fault is there again.

So far we have not been able to identify whether the chips had the fault when supplied, became faulty when installed, or became faulty in use.  We are putting in place additional tests on built units before they are released, but we do not know if we have a potential issue of impending failures in the field. 

So I have a few questions;

A)  Has anyone else observed this type of behaviour?

B)  Is this a known issue with these chips?

C)  What are the failure modes which could lead to this behaviour?

D)  Is there a known way to cause the chips to fail in this manner?  I note that SOA is adjacent to VREF, so things like a temporary short between those pins, that sort of thing.

  • Hi Shafiq, 

    Thank you for your questions and posting to our forum! 

    Please allow me time this week to look into the provided info and questions and follow-up with a response and any next steps.

    Best Regards, 

    -Joshua

  • Thanks Joshua,

    I bit of additional information which may or may not be relevant.

    With a normally functioning unit when we are driving in one direction we see deflection from the midpoint on one of the SOx outputs as we would expect for the iSense.  The other SOx output we don't expect to read anything as the low side gate on that side of the H bridge is off, so the output should be at the midpoint which most of the time it is.  With very low PWM values however, we do see the second iSense signal deflect from the midpoint in the opposite direction to the iSense signal we are expecting to see.  E.g. is driving clockwise we expect to see SOB drop down from the midpoint voltage but at low PWMs we will see SOA rise above the midpoint.  And vice Versa for CCW.   But only at very low PWM.

    With the faulty chips however, we see this behaviour (The SOB signal deflecting in the positive direction)  pretty much all the time that we are driving in the CCW direction, regardless of PWM.  On these faulty units the INHx INLx signals from our micro are exactly the same and if we simply swap the drive chip for a new one the faulty goes away.

    We have probed with the faulty chip and as I say the SPA-SNA value is as we expect (100 mV with 4,000 mA current flow through a 0.025 ohm shunt resistor).  The SNA is at ground, although it has a bit of noise on it.   But the SOA output is not 5 times higher.  So this certainly appears to be a chip fault, and it is not clear why this secondary behaviour I have just described above she be seen.

  • Hi Shafiq,

    Thank you for the additional information! 

    I believe this info is relevant to the review I'm conducting, so please look forward to a further response before the end of this week.

    Best Regards,

    -Joshua

  • Hi Joshua, do you have any feedback?

  • Hi Shafiq, 

    Yes, I am still preparing the feedback to give tomorrow,  I apologize for the delay. 

    Best Regards, 

    -Joshua

  • Ok, It is getting fairly urgent as we cannot explain the failures and our customers are rightly very nervous about this situation.

  • I fully understand,  and hope to help close this issue very soon this week.

    Please look forward to a further response on the matter.

    Best Regards, 

    -Joshua

  • Hi Shafiq, 

    Thank you for your patience on the matter! 

    With this given information there does not appear to be an immediate source for this issue, and I'd like to ask a few clarifying questions to help move forward:

    For this 48V system, what is the peak current being measured? Are there any noticeable transients/ringing on the motor phase outputs? 

    As you mentioned before, one possibility is that the Phase-A CSA becomes damaged during operation and large transients on GH/GLx can lead to such issues. Can we measure the resistance on the Phase-A and B pins on a working unit and a unit showing this odd behaviour? (GHx/GLx/SPx/SNx)

    Can we also reverse the setup so that SNa/SPa is with shunt 2 and SPb/SNb is with shunt 1 (swapping the PWM for Phase A and B) and observe is the how the current readings from the CSA behave?

    Lastly, what has been done with the unused phase-C pins?  Would it be possible to receive the schematic;/layout for this design to overview for this matter?

    A)  Has anyone else observed this type of behaviour?

    This specific behavior is new to me, especially in this 2-phase/H-bridge configuration, but damage on the current sense pins can lead to erroneous behavior.

    B)  Is this a known issue with these chips?

    This does not appear to be a widespread or known issue for the DRV835x CSA design, and I believe is system design specific in this case. The frequency of this behavior observed also leads me to believe that this issue is application related and that we will have to further analyze the beavior.

    D)  Is there a known way to cause the chips to fail in this manner?  I note that SOA is adjacent to VREF, so things like a temporary short between those pins, that sort of thing.

    As mentioned above, uncontrolled large voltages on the outputs can lead to shorts/damage on the CSA inputs, and the abs max for SNx/SPx are [-1V, +1V] continuous voltage and [-5V, +5V] for transients up to 200nS.

    I hope this information can help us to better find the source of this behavior and move forward. 

    Best Regards,

    -Joshua 

  • Joshua, I will need to send you some potentially sensitive files.  I'd rather not do this via an open forum.  Do you have a way for me to do this?

  • I would like to clarify a couple of things.  

    When you ask us to measure the resistance of the pins of the faulty and a working "Unit",  Are we measuring the resistance of one pin against the supply, or ground?  Or are we measuring pairs of p[ins (I.e. SPA/SNA,  GHA/GLA ...)?  If you could specify exactly which pins to measure across and what resistance we should expect.

    Would you expect us to be measuring with the chip removed?  If we were to measure with the chip in the circuit the resistance across SPA/SNA would be around 0.025 ohms, which is our shunt resistor.  So not sure what the test would show.  And we don't really have equipment to measure resistances so low.

    For the test reversing the set up.  This is not straight forwards on a fully built circuit board.  but again some things to clarify.  

    We assume you don't mean for us to remove and swap the shunt resistors themselves.  We may have a way of rerouting the high and low sides of Shunt resistor 1 to SPB and SNB instead of SPA/SNA, and vice versa for shunt 2.   To run tests we would need to modify our SW so that it monitors iSense2 for CCW rotation inste4ad of iSense2 as it currently does.  This modification is fairly simple.  I believe the motor drive part of the chip is totally independent of the iSense so in theory this should be all we need to do.

    Are you suggesting that we also modify it so that it drives the PWMs the opposite way?  I.e. at present GHB would be driven in PWM to turn CCW and GLA would be set high to give a ground path.  So would we need to drive GHA in PWM and GLB high instead?  To do this is a bit more complex in the SW, and we would also have to make a wiring change for the motor, or it would turn CW whilst we are trying to drive CCW.   So if you could clarify precisely.

    You appear to be suggesting that the iSense internals may have been damaged by a very high current.  If this is the case, then should be able to replicate it?  For instance by shorting out the motor? Or simply brushing a 5v wire on the SPB pin?  (I'd do it on SPB rather than SPA first to demonstrate it is an inherent failure mode of the iSense circuits. If that doesn't cause a fault, I'd then do the same on SPA.

  • Hi again Joshua.  I have some files I would like to send you, but need a method of doing so without putting the files on a public forum.  

  • Hi Shafiq,

    Sorry for the delay-- yes I understand,  you should be able to send the files directly to me if you add me as a friend on E2E.

    And please allow me another day to follow-up with the clarification on your asked questions/specific path forward. 

    Best Regards, 

    -Joshua

  • I sent a connection request, if you could check and accept it.

  • Hi Shafiq, 

    I apologize for the delay as we had our major US holiday this week. 

    I have accepted the request and you should be able to message me.

    Best Regards, 

    -Joshua