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DRV8245-Q1: 3.3volt VDD logic supply for DRV8245PQPWPRQ1.

BRIAN JOHNSON
Prodigy 40 points
Part Number: DRV8245-Q1

Tool/software:

The datasheet for the DRV8245PQPWPRQ1 says recommended Vdd Min. =4.5v, Max.= 5.5v.

Will the logic section work with a 3.3v processor when Vdd=3.3V? or does it have to be in the 4.5V to 5.5v range?

  • 0
    TI__Mastermind 44495 points

    Hi Brian,

    The DRV8245PQPWPRQ1 VDD has to be in 4.5V to 5.5V. For 3.3V GPIO logic level interface you may consider the DRV8245SQPWPRQ1. This variant does have external VDD input option. It is internally derived from the VM input. If VM goes below VMUV the device will be inoperative. DRV8245P does not have this downside. 

    Regards, Murugavel

  • 0 in reply to Murugavel4637
    Prodigy 40 points

    Hi Murugavel4367,  Perhaps I have the wrong part number.  The variant I am referring to is the only one with an external VCC pin.  All the others have nSLEEP on pin 24 of the HTSSOP28 package.  This part is labeled SPI(P) variant.  Are you saying the part with the external VDD pin can be powered from 3.3V and function correctly or that I must use the SPI(S) variant to avoid needing a 5volt supply?

  • 0 in reply to BRIAN JOHNSON
    Prodigy 40 points

    Correction VDD not VCC pin.

  • +1 in reply to BRIAN JOHNSON
    TI__Mastermind 44495 points

    Hi Brian,

    You did have the correct part number. That was the P-variant which is also an SPI variant. The P-variant features an external digital supply VDD pin in the place of nSLEEP pin for the SPI (S) variant with orderable part number DRV8245SQPWPRQ1. 

    Murugavel4637 said:
    This variant does have external VDD input option.

    Sorry this was a typo - meant this variant does not have the external VDD input option. Sorry about the confusion.

    Short answer: 

    1. P-variant requires VDD 4.5 to 5.5 V, Logic interface is 5V.

    2. S-variant has internal digital supply derived from VM. The nSLEEP pin also provides the logic high level for the SDO output - see below capture from pin description in the datasheet. When nSLEEP = 3.3V the device will be awake and the SDO logic high will be 3.3V.

    Regards, Murugavel

  • +1 in reply to Murugavel4637
    Prodigy 40 points

    Thanks.  I think I've got it.