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DRV8353: issues with gate drive

Part Number: DRV8353
Other Parts Discussed in Thread: LM5008A

Tool/software:

Hello, 

We are experiencing issues with gate drive on our new board design using DRV8353RSRGZR. The board consist of DRV used in dual supply topology, so for VM we use internal LM5008A adjusted for 16.4V output and 6s-12s battery as a main input. Total bulk capacity on main supply is 600uF. Current rating of the device is up to 120A. Instead of 5R6 we have 0R jumpers placed on all gates. 

Schematic around DRV: 


The first issue is that the rise/fall time of gate voltages in real do not correspond with the calculated values according datasheet. Used output MOSFET is FDBL86062-F085 with Qtot=95nC and Qgd=20nC, for which ideal IDRIVE settings should be ~200mA source and ~400mA sink. 

In real measurements we had to go much higher to reach some acceptable values of rise/fall time:
 

IDRIVEP_LS = 300mA > ~380ns
IDRIVEN_LS = 700mA > ~240ns

IDRIVEP_HS = 650mA > ~640ns
IDRIVEN_HS = 700mA > ~180ns

DEADTIME= 100ns
TDRIVE= 2000ns
VDS_LVL= 1V
SEN_LVL = 0.25V

Overview of one of the phases with applied settings above and it`s gate voltage curves, using motor without load:

Voltage curves on VM16.4V (yellow), VGLS(cyan), VCP(purple), using motor without load: 

  

VGLS and VCP voltages seems very noisy. We tried also add more capacitance on VM (+44uF directly on VM pin), and although VM voltage were smoother, it didn't help with the transients on VGLS/VCP and neither on the gate voltages. 


The second issue, which most likely relates with the first one, is that during power tests with higher load of motor, DRV reports errors and after few tries it sometimes leads to physical damage of chip. Two situations that we catched:  VGLS voltage starts to be wrong or VGS_XX error reported and different resistance measured on MOSFET gates. Errors reported usually are VDS_Hx, VDS_Lx, VGS_Lx, VDS_OCP, GDF. 



Do you have a tip what could be the reason of this behavior ? 


Thanks in advance. 

  • Hi Tomas,

    You mentioned the switching time you are observing isn't the same as your calculated rise and fall times? What are your desired rise and fall times?

    Regards,

    Yara

  • Hello, I would like to target recommended values from DRV datasheet which is 100-300ns for rise time and 50-150ns for fall time. 

  • Hello all, 

    Maybe my previous questions were too general, so I would like to ask something more straightforward. I'm enclosing actually captured waveform of VGLS and VCP and the question is if you think that transients like this are normal and acceptable ?
    The issue with failing gate driver still persist and mainly low-side gate driver errors are reported during fail event. 

    I'm enclosing software and hardware parameters again, so it will be there visible together: 
    IDRIVEP_LS = 300mA = ~380ns (measured rise time)
    IDRIVEN_LS = 700mA = ~240ns (measured fall time)

    IDRIVEP_HS = 650mA = ~640ns (measured rise time)
    IDRIVEN_HS = 700mA = ~180ns (measured fall time)

    DEADTIME= 100ns
    TDRIVE= 2000ns
    VDS_LVL= 1V
    SEN_LVL = 0.25V

    Mosfet gate Qtotal = 95nC (typ)






    Thanks in advance for an answer. 

  • Hi Tomas,

    The waveforms seems quite noisy, when was this scope shot taken? Can you measure GHx to SHx and SHx to GND during these events?

    Regards,

    Yara

  • Hello, thanks for your reply. For now it seems that we solved the issue. Rising and falling edges of mosfets VDS were too steep. We reduced gate currents and for now the board is working properly, also VGLS and VCP looks much better. We were initially afraid of slow gate voltages, but according to materials provided by TI regarding smart gate drives it's not that important. 

  • Hi Tomas,

    Glad you were able to utilize TI content to solve your issue! If you have any further question feel free to post another thread or simply respond to this one.

    Regards,

    Yara