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DRV8412 Layout Question

Mike Holmes
Prodigy 10 points
Other Parts Discussed in Thread: DRV8412

Hi,

I'm laying out and routing a stepper motor controller using the DRV8412 in mode 1 (M1=M2=M3=0). We're going to limit phase current to 6A at 24VDC.

I'm using the example board layout shown in Figure 14 of the device DS (rev. D) as a guide, and I have a question. What is the minimum minimum Cu clearance used between the OUT_x and PVDD_x traces (pins 26-27/28, 31/32, 35/36, and 39/40-41)?

In the picture the gaps look like they're less than 25 mils, but there's no scale, so it might be printer/display distortion.

Thanks in advance for your assistance,

Mike Holmes

  • 0
    TI__Guru 55615 points

    Mike,

     

    We have no specification on it as this EVM is not considered high voltage enough to adhere to creepage/clearance specifications.

     

    To answer your question, we are running ~15mils on the EVM.  This is approximately the spacing between the pins of the device.