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DRV8706-Q1: OTW and OTSD Reset Behaviour

Part Number: DRV8706-Q1
Other Parts Discussed in Thread: DRV8243-Q1

Tool/software:

Hi,

with the SPI-Version of the DRV8706-Q1, what is the Fault Reset Behaviour of the OTW and OTSD Bits?

In the Datasheet p.34 it is stated that Both Bits are latched, on p.36 it is stated that the OTW clears automatically.

What is the Behaviour of the OTW and OTSD Bits?

For my Application I would need the current State of the Overtemperature Warning (thus it is set if it is over the Limit, and clear if it is under the Limit (including Hysterisis of course)). Is there any way to read this State without Continouously clearing all Errors using CLR_FLT?

Thanks for your Help,

Frederic Emmerth

Datasheet:

TEX_DRV8706-Q1 (3).pdf

  • Hi Frederic,

    Thank you for your questions.

    This is not answer of your question, but generally gate driver/DRV8706-Q1 does not have thermal warning condition. FET integrated motor driver (e.g DRV8243-Q1) always heat up and die temp is key items for system design. However, this is not case for gate driver.

     

    DRV8706-Q1 does not have real time temp monitoring function. If I propose something anyway is IC Staus bit (B15-B8) on SPI bus. Each time of SPI communication, this IC Status is provided from DRV. If MCU keep tracking this, it may help for your system.

    regards

    Shinya Morita

  • Hi,

    thanks for the quick Reply!

    So this means Reading the OTW and OTSD Bits in the IC_STAT_2 Register via the SPI Port in the DRV8706-Q1 is non-functional?


    Datasheet p.44, OTW and OTSD Bits

    Or does does this mean that the Overtemperature Warning and Shutdown Functionality are non-functional with this Chip?

    Best Regards,

    Frederic Emmerth

  • Hi Frederic,

    Thank you for your questions.

    SPI communication and status flag function is available when OTW and OTSD is detected. Please refer table 7-9. Digital core is indicating SPI is available or not.

  • Yes, my Question is regarding the Clearing Behaviour of the OTW Bit.
    Is the OTW Bit cleared automatically (as stated in the Table) or is the OTW Bit latched (as stated in the Text)?



  • Hi,

    Thank you for your questions. OTW bit is latched as statement in datasheet.

    regards

    Shinya Morita