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DRV8323R: Application issues.

Expert 1910 points
Part Number: DRV8323R

Tool/software:

Hi Team,

Previously, the DRV8323RS chip was used, with upper tube source/sink currents of 440mA and 380mA, and lower tube source/sink currents of 330mA and 280mA, respectively. It was used to drive a single MOS and has been mass-produced. The MOS gate driving waveform is normal, and the driving voltage remains at 11.375V. The waveform is as follows:

At present, a new project requires driving 2 MOSFETs, and we have adjusted the current output capability accordingly. The source/sink currents on the upper tube are 820mA and 740mA, respectively, and the source/sink currents on the lower tube are 680mA and 520mA, respectively. The MOS gate drive waveform is abnormal, jumping between 11.8 and 16.8V. The waveform is shown below.

Can you help analyze the cause?

note: There is no current limiting resistor added between the driver IC and the MOS transistor. In actual testing, if a 10 Ω resistor is added, the driving voltage will not jump, but the rise and fall time will change significantly.

Thx!

  • Hi Reed,

    Thank you for your question! 

    Would it be possible to send the schematic design for this new dual-MOSFET project? I am a little confused on how this layout is constructed-- are the two MOSFETs being driven by a single phase (A) or by two phases (A/B)? Or, are the MOSFETs connected in parallel in a single phase? Lastly, are the MOSFETs the exact same component/OPN?

    Can we also measure how VCP/CPH/CPL are behaving during this PWM sequence, as they are responsible for supplying the high-side driving capability?

    It will be much easier to suggest next steps after clarifying some of the above points, and I hope to help solve this inquiry swiftly. 

    Best Regards,

    -Joshua