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DRV8706-Q1: Spi frame default status (MSPM0G3705)

Solofo BUSCOTIN
Prodigy 30 points
Part Number: DRV8706-Q1
Other Parts Discussed in Thread: MSPM0G3507,

Tool/software:

Hello, I’m working on a DRV8706 with an MSPM0G3507. I can read and write registers, but I'm consistently getting a fault status on the SPI.



I've configured my SPI to 1MHz, with Polarity Low, Phase High, and No Parity. I have a timing diagram that seems coherent, but I’m not sure why I’m receiving this status.

Do you have any ideas or suggestions for me to test? Thank you in advance !

  • 0
    TI__Mastermind 29725 points

    Hello Solofo,

    Based on the logic capture shared, the clock polarity for data capture is incorrect. For the DRV8706-Q1 the capture happens with the falling edge of the clock. See below from the datasheet. 

    Here's an example capture from a similar SPI DRV device. the clock phase should be changed to match this. 

    Regards, Murugavel 

  • 0 in reply to Murugavel4637
    Prodigy 30 points

    I think it’s just the oscilloscope configuration. I have it set to capture on the falling edge, but the result is still the same. When I configure the register (like IC_CTRL, for example), I read the correct value. What I don’t understand is why it returns an error status when it accepts my configurations. 

  • +1 in reply to Solofo BUSCOTIN
    TI__Mastermind 29725 points

    Hello Solofo,

    Solofo BUSCOTIN said:
    I think it’s just the oscilloscope configuration. I have it set to capture on the falling edge, but the result is still the same.

    I agree it looks correct now.

    Solofo BUSCOTIN said:
    When I configure the register (like IC_CTRL, for example), I read the correct value. What I don’t understand is why it returns an error status when it accepts my configurations. 

    Have you looked at the SPI signals analog level with an oscilloscope? Often times the digital sniffer tool does not show the true signal. Just to make sure there's no noise on any of these lines especially SCLK. 

    Can you also do a CLR_FLT in the IC_CTRL register clear the error and do a new SPI transaction to see if the SPI error is reported again? Thanks.

    Regards, Murugavel 

  • 0 in reply to Murugavel4637
    Prodigy 30 points

    Hello Murugavel, 
    Thank you, this resolve the problem : "Can you also do a CLR_FLT in the IC_CTRL register clear the error and do a new SPI transaction to see if the SPI error is reported again?"
    Have a good day !