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DRV8874: Input to output timing not within limits.

Fabian Hladik
Prodigy 20 points
Part Number: DRV8874

Tool/software:

Hello,

We have found that the trise, tfall, tpd, and tdead times for the DRV8874PWPR are significantly off from their typical values. In the case of tpd, there is more than a factor of 2 between the typical time specified in the datasheet and the time we measured.

Additionally, we noticed that during the falling slope, the voltage initially drops slower, and after approximately 575 ns, it starts to drop faster. I interpreted this time as the output dead time (tdead).

We also observed that the measured times correspond more closely to the automotive variant (DRV8874-Q), but we are sure that the non-automotive version is used.

Please take a look at the oscillograms and help us with the following questions:

    -Are the times measured in the diagram interpreted correctly?
    -What could be the reason for the times being so far off their typical values and for the unusual falling voltage curve?

The test setup is the same as stated in the datasheet: 200 Ohm from each output to GND.

CH1: OUT1
CH2: OUT2
CH3: IN1
CH4: IN2

Reverse / Break:

Forward / Break:

CH1: OUT1
CH2: OUT2
CH3: IN1
CH4: IN2


Thanks in advance

  • 0
    TI__Mastermind 19480 points

    Hi Fabian,

    Apologies for the late reply.

    Please allow me 24 hours to look into this. I am reviewing it now and should have feedback for you by tomorrow. 

    Best,

    David

  • 0
    TI__Mastermind 19480 points

    Hi Fabian,

    It appears that the control logic is driving the load between Reverse and Brake mode. Could you please try driving the control logic from Forward and Brake mode to see how that affects the timing? To do this, hold IN1 high and PWM on IN2.

    Best,

    David

  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David,

    I should have added more precise a picture description.
    In the first and second picture, the load is driven between Reverse and Break. In the third and fourth picture, the load is driven between Forward and Break.

  • 0 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hi Fabian,

    Are you testing on a DRV8874EVM or with another PCB? If it's another PCB design, can you provide layout or schematics?

    Best,

    David

  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David,
    This is the schematic, we use:

  • 0 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hi Fabian,

    I believe the issue could be from how the measurements are taken. The following image may help with where or how to measure the transition between these times. 

    Is there any concern or design restrictions in particular that is causing an issue or is this just for device evaluation?

    Best,

    David

  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David,
    We are making these measurements, and compare them with the datasheet, to make sure, that our schematic doesn't cause any problems. In this case, there are differences with the datasheet, regarding times and the signal trace.

    Here is a measurement, with the H-Bridge driving a DC motor.
    CH1: OUT1
    CH2: IN 2
    CH3: Pin3 (Sleep)


    In this measurement, the signal trace of CH1 (OUT1) matches the one, that is in the image you sent, but the timings are still far off.

  • 0 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hey Fabian,

    I'm thinking maybe the capacitors on the output pins could be slowing down the timing during switching. Could you try removing caps on outputs and see if that helps?

    Best,

    David

  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David,
    thank you for the reply, you were right, it seems as the output capacitors cause the unusual voltage courve.
    Left: With capacitors. Right: without Capacitors

    CH1: OUT1
    CH2: OUT2
    CH3: IN1
    CH4: IN2

    At 150ns the fall time is now also close to the typical value of 150ns.
    But the other timings still don't match with the datasheet. The time i marked (649ns) is still higher than the sum of Tpd and Tdead.

  • 0 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hey Fabian,

    I'll do my best to recreate this setup in the lab. I'll reach out when I know more. 

    Best,

    David

  • +1 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hi Fabian,

    My lab tests confirms the times that you are seeing. I believe the confusion is coming from measuring the dead time. The dead time can be difficult to measure on a scope. 

    By looking at the image from my previous post, you can get a more accurate representation of propagation delay by measuring tPD + tdead to the rise time, and subract the typical dead time. 

    I was also seeing higher than typical propagation delays (tPD = 640ns - 100ns = 540ns), but the timing is still within the device specs. It looks like the device you are testing is behaving as expected. 

    Best,

    David

  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David,

    Thank you for your reply. We will remove the output capacitors. Since your device behaves the same way as ours, we can now be sure that our schematic isn't causing any problems.

    Best,
    Fabian



  • 0 in reply to David Medis
    Prodigy 20 points

    Hi David
    To be sure, I repeated all the measurements for tpd+tdead:

    Reverse (output falling)   635ns
    Reverse (output rising)    757ns  (your measurement:640ns)
    Forward (output falling)   570ns
    Forward (output rising)    765ns

    I noticed we compared the wrong times before. (You measured a rising edge, I measured a falling edge).

    When comparing the right times, there are still around 100ns between your and my measurements. Could this be caused by the fact, that you are switching between (coast/reverse) and my measurements are between (break/reverse).

    Please take a look at the those times again and tell me, if those are OK or not.

    Thanks a lot.

  • 0 in reply to Fabian Hladik
    TI__Mastermind 44615 points

    Hi Fabian,

    David is out of office until Friday and will be back on Monday. He'll follow up with you on Monday. Kindly bear with us for the inconvenience. Thank you.

    Regards, Murugavel 

  • 0 in reply to Fabian Hladik
    TI__Mastermind 19480 points

    Hi Fabian,

    I was switching from Forward to Coast mode.

    I believe the timings could be different due to the current decay modes used. Although the naming schemes can be a bit misleading, the Coast mode is also referred to as Fast Decay and Brake mode is called Slow Decay. Fast and Slow meaning how quickly the current through the load decays towards zero. 

    Please see the following app note on more details on decay modes:

    Current Recirculation and Decay Modes (Rev. A) 

    It seems that the timings you are seeing are within expected ranges.

    Best,

    David