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DRV8703-Q1: OTSD bit not set after CLR_FLT while temperature remains unchanged

Part Number: DRV8703-Q1

Tool/software:

Hi team,

I am testing DRV8703-Q1 thermal shutdown function, and find that: When T rises above 130 Celsius degree, I can read OTSD is set. After that, I send CLR_FLT to clear OTSD bit, and I cannot read OTSD is set while the temperature remains above 130 Celsius degree. Is this normal? Will OTSD be set again only after T falls below TSD-T(hys), and rises above TSD again?

BR,

Bengi

  • Hi Bengi

    Thank you for your question.

    DRV move to "shutdown" when Tj reaches to TSD(150C). Then device temp goes down. 

    If you are testing by forcing Ta=130C, it may generate temp gap between Tj and Ta.

    Then DRV goes to shut down mode by TSD. It is hard to explain your behavior, but this gap and device shutdown may impact to your test result.

    >>Will OTSD be set again only after T falls below TSD-T(hys), and rises above TSD again?

    Yes.

    regards

    Shinya Morita