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DRV8323: How to suppress power supply noise

Conor
Guru 12065 points
Part Number: DRV8323

Tool/software:

Hi,

I am having trouble with the spatial noise generated by the DRV8323SRTA when the power is on and the FET is not yet operating (no PWM control or SPI communication). Specifically, 45dBμV of noise occurs at a peak of around 100MHz.

The noise is large around pins 20/21 for the IC alone, and large around the power supply + charge pump terminals of pins 1 to 4 in the surrounding patterns (pattern distance is shortest). If a wide area including the IC and surrounding patterns is covered with aluminum foil, the noise is greatly reduced.

From this state, I believe that the VM power supply and charge pump circuit inside the IC are the cause. Is there any way to suppress this noise (capacitor, filter arrangement, etc.)?

Thanks,

Conor

  • 0
    TI__Genius 12231 points

    Hi Connor,

    Thank you for reaching out on our forum! 

    If I'm not mistaken pins 20/21 on DRV8353S-RTA package are the SNC (amplifier input) and SOC (amplifier output for C phase) which should not have a high current ripple/EMI source capability.  Would you be able to help provide your schematic for review of external components?

    The charge pump switching circuit is indeed a major source of noise,  so to help combat this we recommend that the associated VCP, CHP, and CPL capacitors be brought as close to the driver IC as possible and kept on the same top layer as the driver.  This recommendation holds for the power supply bypass capacitors as well. 

    Another major factor that could help to reduce EMI is reducing your gate switching speed (IDRIVE) to minimizethe strain on the charge pump and the emi caused by the dast slewing.  What is the current IDRIVE setting,  and can it be lowered to a much lower setting?(if not already)

    Best Regards,

    -Joshua

  • 0 in reply to Joshua Maize
    Guru 12065 points

    Hi Joshua,

    Thank you for your comment.
    I would like to send you a detailed circuit diagram, so please approve my private message.

    Thanks,

    Conor

  • 0 in reply to Conor
    TI__Genius 12231 points

    Hi Conior, 

    Sure, I will provide review. 

    Best Regards, 

    -Joshua

  • 0 in reply to Joshua Maize
    Guru 12065 points

    Hi Joshua,

    It seems I still can't send private messages. Can you check?

    Thanks,

    Conor

  • 0 in reply to Conor
    TI__Genius 12231 points

    Hi Conor,  

    I have accepted your request yesterday so you should be able to send the document(s).

    Please try again and let me know if it allows it.

    Best Regards, 

    -Joshua

  • 0 in reply to Joshua Maize
    TI__Genius 12231 points

    Hi Conor, 

    Just following up to see if you could send the associated files, or let me know if this inquiry is no longer ongoing/open. 

    I look forward to your response. 

    Best Regards,

    -Joshua

  • 0 in reply to Joshua Maize
    Guru 12065 points

    Hi Joshua,

    Sorry for the late reply...

    The capacitor is on the same top layer, close to the IC terminal, but I moved it closer to test it, but the problem did not improve.

    We are currently investigating ways to slow down the gate switching speed (IDRIVE).

    Thanks,

    Conor

  • 0 in reply to Conor
    TI__Genius 12231 points

    Hi Conor, Thank you for your response.  

    Conor said:
    We are currently investigating ways to slow down the gate switching speed (IDRIVE).

    Are you having trouble changing the IDRIVE setting through SPI? It should be configurable to the lowest setting according the register values given here:  Lowering the IDRIVE to the lowest setting and potentially increasing the PWM should help to reduce the EMI observed. 

    Best Regards,

    -Joshua