DRV8706-Q1: EMC

Andy Jin

Part Number: DRV8706-Q1

Tool/software:

Hi Expert,

In the project based on the DRV8706-Q1, the first batch of samples has entered the testing phase. Yesterday, we conducted preliminary experiments on the RE and CE functions. The test results showed that when the PWM duty cycle was 100%, the test passed successfully. However, when the duty cycle was not 100% (e.g., 50%, 60%, and a sweep from 20% to 80%), the test results failed. We performed tests at frequencies of 16kHz and 20kHz, and found that the duty cycle had a significant impact on the experimental results. How can I improve the EMC?

Thanks a lot!

Andy

7 months ago

0 Ibinu Alaudeen Nadeera 7 months ago

TI__Genius 11811 points

Hi Andy,

Thanks for your question.

For our understanding has the tests been done in the EVM or any other hardware.

Can you please share the schematics if it was done using another hardware.

Thanks,

Ibinu

0 Andy Jin 7 months ago

Intellectual 450 points

Hi ibinu,

Just use customer's own board, not EVM. And the schematic is as below.

0 Shinya Morita 7 months ago in reply to Andy Jin

TI__Mastermind 44835 points

Hi Andy,

Thank you for your questions. With gate driver PWM operation, customer put L/C (PI) filter like bellow example on TI EVM. This could contain EMC noise.

With this PI filter, reducing tr/tf of SH pin by lower IDRIVE could be further improvement.

Normally we suggest schematic review to customer before PCB comes. If you provide customer's schematic including external FET parts, I can provide some feedback/suggestions.

regards

Shinya Morita

0 David wang 7 months ago in reply to Ibinu Alaudeen Nadeera

Prodigy 80 points

3022.Sheet1.pdf

0 David wang 7 months ago in reply to David wang

Prodigy 80 points

Hi Expert,

Please refer to the attached schematic for guidance

0 Shinya Morita 7 months ago in reply to David wang

TI__Mastermind 44835 points

Hi,

Thanks. I will review it and feedback to you in a day or two.

regards

Shinya

0 Shinya Morita 7 months ago in reply to Shinya Morita

TI__Mastermind 44835 points

Hi,

I have reviewed their schematic. Here is suggestion.

1)PI Filter.

I noticed customer's schematic has PI filer. Then could not see the value of inductor. May be good to try ~2uH same as our EVM, Best value could be different, so ~2uH is just general suggestion.

2) IDRIVE - slower SH rise/fall.

This is very general feedback, but normally slower rise/fall of SH could help for EMC. (e.g >500ns-1+ us).

I saw diode, capacitors normally our DRV does not need. Especially diode may impact some operation of DRV. I suggest to remove these and adjust IDIRVE to have proper SH rt/tf behaivior.

regards

Shinya

0 David wang 7 months ago in reply to Shinya Morita

Prodigy 80 points

Hello, thank you for your suggestion. The current inductance value is 3.3uH

0 Shinya Morita 7 months ago in reply to David wang

TI__Mastermind 44835 points

Hi David,

Thank you for your feedback. Then suggest to try 2).

regards

Shinya

0 David wang 7 months ago in reply to Shinya Morita

Prodigy 80 points

Hi Shinya

Thank you for your support，Is it better for the driving ground and H-bridge to share ground or not share ground

0 Shinya Morita 7 months ago in reply to David wang

TI__Mastermind 44835 points

Hi,

Thank you for your question. Please expect some delay due to Monday is national holiday in US

0 Shinya Morita 7 months ago in reply to Shinya Morita

TI__Mastermind 44835 points

HI,

Same/only one GND is recommended-not recommended floating GND each other. I saw some customer separated each GND and some voltage delta happens these two GND. It causes some functional or over stress issue.

Datasheet shows some example-FYI.