DRV8872-Q1: Leakage Current

Hi Xiaowei,

Please allow me some time to look into this. I will aim to provide a response by tomorrow.

Regards,

Joshua

Hi Joshua,

In this case, the MCU is in sleep mode and has no power supply, so IN1 and IN2 are low.
Can you give an example to explain " the strong pull down current which is used to keep the FETs in the off state.“ ?

Best Regards,

Xiaowei Zhang

Hi Xiaowei,

I will need to reach out to our internal team to get a better explication for this leakage path. I will aim to provide an update by wednesday.

Regards,

Joshua

Hi Joshua,

Can you please update the latest status? Thank you

Best Regards,

Xiaowei Zhang

Hi Xiaowei Zhang,

I am still working with our systems team to figure out the path. Unfortunately this device is relatively old so the information about how the internals of the device is difficult to find. I have reached out to our design team and should have an answer within two days.

Regards,

Joshua

Hi Joshua,

Have you got updates from design team?

Best Regards,

Xiaowei Zhang

Hi Xiaowei,

I have not heard back from design yet. I pinged them today so I should hear back tomorrow.

Regards,

Joshua

Hi Joshua,

Can the leakage current be eliminate? If not, can you please recommend a similar device without this leakage current? 

Best Regards,

Xiaowei Zhang

Hi Xiaowei,

Could you let me know the customers expected max current, nominal current, max voltage, nominal voltage, and the number of loads they will be driving? With this information I will see which part will work best for the customers application.

Regards,

Joshua

Hi Joshua,

The load is sov, the operating voltage is 9-16V, the maximum current is 1.2A, and we hope that the leakage current of the chip is less than 100uA when the chip is disable state.

Best Regards,

Xiaowei Zhang

Hi Xiaowei,

I will look into this, I will get back with you tomorrow.

Regards,

Joshua