This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8962: deterministic jitter pattern on output of driver

Part Number: DRV8962
Other Parts Discussed in Thread: DRV8462, DRV8412, , DRV8262

Tool/software:

Dear TI support,

I'm facing issue in implementing a design that uses part DRV8962DDV.

What I can see on the output of any of the four channel is jitter in the turn on and turn off time referred to the INPUT IN signal.

Specifically, what seems odd is that there is a deterministic distribution of the jitter, which in turn makes the application underperforming ( excess noise in the output voltage after LC filtering ).

EG: there is a discrete jump in the jitter of about 150nS, which changes the ON time compared to input signal. See picture for reference, measured on EVAL.

This behavior is present in both our design and in the evaluation board, at all duty cycle, with or without load. Tested at PWM frequency of 100kHz and 200kHz.

Please advise if this can be fixed or if it has to be considered in specs for the part.

Best regards,

Antonio

channel 1 INPUT

channel 2 OUTPUT

  • Hi Antonio,

    Thanks for reaching out to us.

    The DRV8962 has an integrated spread spectrum clocking feature that dithers output switching dead-time as well as charge pump clock by about +/- 10 % to reduce EMI generated. See below image from the DRV8462 datasheet which belongs to the same family of devices. 

    The dither on the output is independent of the PWM drive input frequency which happens on the rising and falling edges. See below capture from OUT1 with 200KHz PWM 50%. This feature cannot be disabled.

    This behavior is present in both our design and in the evaluation board, at all duty cycle, with or without load. Tested at PWM frequency of 100kHz and 200kHz.

    The MSP430 MCU used in the EVM also has clock dithering which means the PWM output from it also has dither and it is not a good reference to measure the DRV8962 dither. The above scope capture was with the EVM but using a clean dither free external PWM input.

    See below information about this SSC feature from the DRV8462 which also applies to the DRV8962. In the DRV8462 it can be disabled using an SPI command while it is fixed function in the DRV8962. Thank you.

    Regards, Murugavel 

  • Hi Murugavel,

    thank you for highlighting this feature. This should have been documented on the datasheet for proper evaluation and selection of the part.

    Is there any part similar to DRV8962 where spread spectrum can be disabled? Unfortunately, seems that DRV8462 does not allow direct control of the H-Bridges.

    Best Regards,

    Antonio

  • Hi Antonio,

    This should have been documented on the datasheet for proper evaluation and selection of the part.

    Agreed. We've added to our datasheets updates database already.

    Unfortunately, seems that DRV8462 does not allow direct control of the H-Bridges.

    Correct, this device has built-in indexer for stepper motors.

    Is there any part similar to DRV8962 where spread spectrum can be disabled?

    What would be the operating voltage and load current requirements, fPWM frequency, Current regulation needed or not? 

    Specifically, what seems odd is that there is a deterministic distribution of the jitter, which in turn makes the application underperforming ( excess noise in the output voltage after LC filtering ).

    What was the PWM frequency used for this test, 100 kHz? Was the internal current regulation feature used? The DRV8962 is used in TEC applications with LC filters. What is your end application? Thank you.

    Regards, Murugavel 

  • Hi Murugavel,

    it is a TEC driver, 24V, MAX current 5.5A, PWM 200kHz, but we can accept > 120kHz. Current regulation not required but current monitor ( IPROP ) would be nice to have.

    The picture I posted above was from a 100kHz test, but 100kHz and 200kHz were tested.

    Current limit was set high enough to not be triggered in any circumstance.

    Best regards,

    Antonio

  • Hi Antonio,

    Thanks for the details. fPWM > 100 kHz and 24 V / 5.5 A max current limits the number of drivers in our portfolio that could be used. There used to be a DRV8432 (similar to DDV package) that is obsolete now. We do have the DRV8412 in DDW package that can support up to 12 A peak in parallel mode (single H).

    The picture I posted above was from a 100kHz test, but 100kHz and 200kHz were tested.

    The dither is fixed regardless of the input PWM frequency. This does help with EMI mitigation in BDC motor applications. Thank you.

    Regards, Murugavel 

  • Hi Antonio,

    I have a question for you.

    This behavior is present in both our design and in the evaluation board, at all duty cycle, with or without load. Tested at PWM frequency of 100kHz and 200kHz.

    With the EVM we know the input PWM has jitter because of the MCU feature. With your design did you confirm the input PWM has not jitter but the output PWM shows this jitter? When did you get the DRV8962DDV samples, from a mm/yy standpoint? Thank you

    Regards, Murugavel 

  • Hi Murugavel,

    I can confirm same behaviour on both EVM and our design.

    marking on the part in our design is

    46KTI

    ACZ4

    DRV8962

    Best regards,

    Antonio

  • Hi Antonio,

    Thanks for the feedback and the marking info. I was told the DRV8962 should have this SSC feature disabled. We're verifying this with our hardware. I'll get back to you as soon as we have test results. Thank you.

    Regards, Murugavel 

  • Hi Antonio,

    We verified and confirmed the DRV8962 does not (edited) have the SSC disabled. Thank you for your patience and sorry this took a while to confirm. We're still investigating the source of output jitter. We'll keep you posted. Thank you.

    Regards, Murugavel 

  • Hi Murugavel,

    thank you for the update.

    Does this means that you saw the same behavior in your tests?

    Best Regards,

    Antonio

  • Hi Antonio,

    We saw the behavior you reported with the DRV8962VEVM and with a clean 100 kHz PWM input. Similar ~ 105 ns jitter was noticed in the falling edge as well. This was constant regardless of the PWM frequency or duty cycle. See below capture. We've started an investigation. I'll keep you posted with our findings. Thank you.

    Regards, Murugavel 

  • Hi Antonio,

    Thank you for your patience. Sorry it took this long for the investigation closure.

    We confirmed the DRV8962 does not have the mentioned spread spectrum dither feature. Two other devices in this family, the DRV8462 and the DRV8262 do have this dither feature.

    That said, in many of our BDC motor drivers including the DRV8962, the INx edges are synchronized (sampled) with the internal (10 MHz in the DRV8962) digital clock of the device using a digital synchronizer for further processing with the output control logic. Because of the asynchronous nature of the INx, the edge synchronizer output could see a variance up to two clock periods which renders as output jitter. This is the behavior we observe with the DRV8962 outputs. 

    Also I saw a significant typo in one of my previous messages. I will edit it for the sake of the forum. Sorry about that. Thank you once again.

    Regards, Murugavel 

  • Hi Murugavel,

    thank you for the update.

    Best regards,

    Antonio