UCC15241-Q1: BLDC driver design

Audible noise is usually heard in <30kHz. If audible noise is heard from UCC15241-Q1, then burst mode frequency is < 30kHz. Usually due to operating with very low load or no load, and/or output capacitance is high.

To remove/reduce audible noise, we need to push burst mode freq to >30kHz by

• Reduce output capacitance. Be sure to use COUT1b as described in the Excel Design Calculator
• Increase load by using a bleeding resistor or reduce the feedback resistor values (caution: this increases power consumption)

 UCC15241-Q1 locks into the PWM frequency....13kHz in your example.

1. Ceramic capacitors could create a piezoelectric mechanical resonance that amplifies the audible noise detected. 
   1. In some customer designs, we have heard some slight audible noise.

2. Ceramic capacitor selection is important (as described in the references below).  We recommend placing the high frequency decoupling capacitors as close to the IC as possible – this will reduce how hard the bulk capacitors have to work.  The bulk 2.2uF – 10uF usually take up most of the low frequency energy.  A higher ESR helps reduce the noise – adding an electrolytic capacitor can be used in parallel to help.   Try this at the input first.  One electrolytic cap can be used for multiple isolated bias.  Adding an electrolytic cap at the output needs to used with caution as it affects the gate drive – see item #2 below.

1. 1. You can see these good references to help

1. How to reduce acoustic noise of MLCCs in power applications
2. SSZTB09 Technical article | TI.com

• Reducing MLCCs' piezoelectric effects and audible noise - EDN

1. MLCC solutions for suppressing acoustic noise in the battery lines of laptop computers | Ceramic Capacitor | Murata Manufacturing Co., Ltd.

Steve