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DRV8320: Does DRV8320 saves my MosFETS?

Nick Sklavos66
Prodigy 200 points
Part Number: DRV8320

Tool/software:

On a three phase inverter (BLDC) and with Block (6-step) commutation, with Vishay TrenchFET, 60V max Vds, with a 48V bus, our schema is as follows:

One totem pole is PWM-ing (for power control) with complimentary switching of the two (high FET, Low FET) and another totem pole low side is the commutation switch.

In other words, during a 60 degrees quadrant a) a sink low side FET is on, and b) a source pole is PWM-ing with complimentary switching.

When the next quadrant is to take over, the sinking (commutation) FET turns off (say phase C), its high side FET body diode starts freewheeling, then after a small software delay we turn on the FET of the next sinking pole/phase (say phase B). During that time, the sourcing pole (say phase A), while totem pole A is complimentary switching high FET - low FET (avoiding a shoot through switch sequence), then WHEN the sourcing totem (pole A) switches from "low on - high off" to "low off - high on" at phase C that was on and now its off (across the low FET) a transient appears of 20nsec duration that is ~7V above the bus. The transient is 100% correlated with the PWM-ing.

Whatever we do, the transient seems to never go over ~55V It can go lower, with different motor currents and with slowing the gates current (IDRIVE) but seems very strange that that limit exists !!

One thought is that the DRV has some mechanism of shunting transients on the phase lines of VM+7V (55 in our case). Or something similar?

We have to slow down the gate charge, because 55V is very close to the 60V maximum FET Vds. We are ready to launch the product, and changing the FET is not an option.

Attached is an image where the transient appears twice,

  • 0
    TI__Genius 15395 points

    Hi Nick,

    What does this transient looks like on the other phases at the right time?

    what is the MOSFET being used? and the IDRIVE setting? Usually these are the first thing that would be beneficial to check since having too high of an IDRIVE setting with too low of a Qgd value from the MOSFET can cause really fast switching times that could lead to transients.

    Regards,

    Yara

  • 0 in reply to Yara Al Shami
    Prodigy 200 points

    Hello. BLDC, high speed.
    The transient exists on the low side phase of the mosfet that has just turned off, exactly when another totem pole high side turns on The spike does not exist in the other two phases when in appears in that just off phase.(eg PWM, or commutation quadrant change).

    This spike occurs in all three phases at the conditions described above.
    I IDRIVE is 260/520mA, and we reduce it for this design to 120/240mA, that seems to eliminate the spike.

    My Texas question though was not answered, because I would like to use the current design to the next one. Does the DRV has a mechanism of shunting transients on the phase lines of VM+7V transient? And does the DRV fail (or something else) on Vvm+5 continuous? Explaining: at the AMR's there are two rows:

    i) Continuous high-side source sense pin voltage (SHx) = Vvm+5
    ii) Transient 200-ns high-side source sense pin voltage (SHx) = Vvm+7

    Thus on a 36V bus, the ii) is 43V (200nsec) and on a 48V bus the ii) is 55V (200nsec). Does the DRV shunts energies of Vvm+7? What does that AMR tell us designers to avoid? Why is there a time limit 200nsec?

    And the i) also for the continuous case.

    Thank you

  • +1 in reply to Nick Sklavos66
    TI__Genius 15395 points

    Hi Nick,

    I'm not sure I understand your questions entirely.

    Nick Sklavos66 said:
    Does the DRV has a mechanism of shunting transients on the phase lines of VM+7V transient?

    Are you asking whether the device has the ability to eliminate these transients or moments where SHx is higher than VM?

    Not really, the transients are a result of switching to fast therefore things like lowering IDRIVE setting should be taken into consideration which seems to have worked for your application.

    If these absolute maximum ratings are exceed there is a possibility that the device could get damaged.

    Regards,

    Yara