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DRV8106-Q1: TDRIVE State Machine timing chart

Yonekawa Iori
Prodigy 50 points
Part Number: DRV8106-Q1
Other Parts Discussed in Thread: DRV8706-Q1

Tool/software:

I would like to estimate the delay time that I_GLx(I_GL_x=I_HOLD)  reflects V_INx change(Hi->Lo)  on "Figure 7-5. TDRIVE State Machine".

(I would like to ask the same for DRV8706-Q1)

(1)In my understanding, it can be calcurated from following. Is it correct?

     t_PD+t_DRIVE(for I_DRIVEN)+t_DEAD_D+t_DRIVE(for I_DRIVEP)

(2)When I_GLx changes from I_DRIVEP to I_HOLD, the value seems to change vertically. 

     Is there NO delay regarding this transition?

  • +1
    TI__Mastermind 24470 points

    Hi Yonekawa,

    Yonekawa Iori said:
    (1)In my understanding, it can be calcurated from following. Is it correct?

    This equation is correct.

    Yonekawa Iori said:
    (2)When I_GLx changes from I_DRIVEP to I_HOLD, the value seems to change vertically. 

    There is a delay for the gate drive current to change from the I_DRIVE level to the I_HOLD level. The reason that this delay is not mentioned in the diagram or specified in the datasheet is that the timing for the change in gate drive current is a part of the t_DRIVE timing.

    Regards,

    Joshua