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DRV8428: can't get any output current

Part Number: DRV8428

Tool/software:

We are using a DRV8428RTER on a simple board to drive a small step bipolar motor (winding res: 60ohm) at 12V supply.

Unfortunately we can't get any output to drive the motor windings.

We have tied nSLEEP to VM: we get stable DVDD as expected. (img. 1). 

M0, M1 and Decay mode are set to GND (tried also connected to DVDD); VREF is obtained from DVDD with a 33k/3k3 partition to get 0.55V (so plenty of current for these windings).

We tried, then, to rise ENable after some seconds.  We connected EN trhough a 220k resistor and a 22p cap, to use nFAULT as indicated in Fig 7-15. Rising the EN resulted also in nFAULT to rise, stable.

Am I right to expect that both windings should be, at this moment, active with, in this configuration, 100% current?  We see no variation at the terminals of windings. (see img. 2) 

Trying to pulse STEP doesn't change anything.

Capacitors on VM: 100uF + 10nF  / DVDD 470n

Can't see what we're doing wrongly...

Img.1 : Ch1 VM ; Ch2 DVDD

img 2: Ch1: yellow  nFAULT; Ch2 blue  ENable; Ch3 pink DVDD; Ch 4 green voltage across A+/A- (channels are insulated)

  • Hi Fabio,

    Thank you for your question.

    Am I right to expect that both windings should be, at this moment, active with, in this configuration, 100% current? 

    Yes when setup for Full-step 100 % the home position default with no STEP pulses applied.

      

    M0, M1 and Decay mode are set to GND (tried also connected to DVDD); VREF is obtained from DVDD with a 33k/3k3 partition to get 0.55V (so plenty of current for these windings).

    With 33k and 3k3 potential divider from VDD 5 V TYP would result with VREF = 0.45 V which would be IFS = VREF/3 = 0.45/3 = 150 mA. With VM = 12 V and winding R = 60 Ω the max possible current would be 200 mA. So IFS = 150 mA is a reasonable setting with current regulation. DECAY to GND selects STRC decay mode which is fine.

    The schematic looks okay. Like you mentioned nSLEEP is tied to VM. The VIH specification in the data sheet is 5.5 MAX - see below although the abs. max is VM for this pin. I don't think this would be the reason for the issue because VDD comes up to 5 V suggesting device is awake.

    We connected EN trhough a 220k resistor and a 22p cap, to use nFAULT as indicated in Fig 7-15. Rising the EN resulted also in nFAULT to rise, stable.

    While this RC time constant is in compliance with the recommended < 20 μs, I'm not sure if 220 k helps maintain VIH under all conditions. Just for a check could you please replace this a 10 kΩ and check? Thank you.

    Regards, Murugavel 

  • Many thanks Murugavel,  

       we chose to drive ENable with 220k to take into account the internal resistors 16k and 2Meg; I repeated test with just 10k: no apparent change.

    Ch1: DVDD; Ch2 (trig) ENable; (ch3 -); Ch4 across winding.

  • Solved !!

    Connecting nSLEEP to a 5V input (not to VM) solved it!

    TI should clearly state in the DS that nSLEEP *cannot be tied to VM* (beside the note that DVDD can't be used). 

    As the 8428 does not need a separate 5V supply, and nSLEEP can accept VM voltage, there is a reasonable, IMHO, temptation to use the only supply VM.

    (will just test if there is any needed time delay between VM and nSLEEP: this test rised nSLEEP after some seconds since VM)

    Thanks again for your hints.

    Fabio

  • Additional Note on nSLEEP:

    given the configuration of nSLEEP input pin:

    I've tried to connect it to VM through a 390k resistor with OK results:  Ch1 DVDD; Ch2 nSLEEP pin; Ch3 VM pin.

    Does not seem to have any concern in terms of timings.

    What concerns could arise driving nSLEEP with series resistor to VM (10V in this case)?

  • Hi Fabio,

    Thanks for the update. Glad you have the issue resolved.

    TI should clearly state in the DS that nSLEEP *cannot be tied to VM* (beside the note that DVDD can't be used). 

    As the 8428 does not need a separate 5V supply, and nSLEEP can accept VM voltage, there is a reasonable, IMHO, temptation to use the only supply VM.

    I understand your thought process and comment with this. We will review the wording for future datasheets. That said, nSLEEP is a digital input with VIH and VIL specification in the datasheet similar to all other digital input specifications. For proper digital state VIL and VIH must be in compliance. Having an absolute max. specification does not mean it can be used for functionality. For example absolute max for VM is 35 V and operating VM max is 33 V. Our recommendation does not include > 33 V operating voltage. Absolute max is the point at which the device is expected to get permanently damaged. We've explicitly mentioned in the "Recommended Operating Conditions' the logic level input voltage MIN and MAX, must be complied. Anyways, glad you got it resolved. 

       

    Regards, Murugavel

  • Hi Fabio,

    I've tried to connect it to VM through a 390k resistor with OK results:  Ch1 DVDD; Ch2 nSLEEP pin; Ch3 VM pin.

    Does not seem to have any concern in terms of timings.

    What concerns could arise driving nSLEEP with series resistor to VM (10V in this case)?

    As long as the logic level for VIH is in compliance i.e. >  1.5 V and < 5.5 V a potential divider type solution is acceptable. Thank you.

    Regards, Murugavel