This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8363-Q1: Logic Truth Table

Part Number: DRV8363-Q1

Tool/software:

Hello,

It is not entirely clear from the datasheet which input logic has priority. Can someone help please in reviewing and completing the below table, please replace L/H in case of no care.

GD Input Signals GD Mode Note
nSLEEP DRVOFF  ASCIN
L L L Sleep  
H L L Normal  
L H L Sleep  
H H L Standby LS and HS constant off
L L H Sleep  
H L H Standby LS or HS constant on
L H H Sleep  
H H H Standby LS and HS constant off

Regards,

Viktor

  • Hey Viktor,

    Appreciate the question on this.

    GD Input Signals GD Mode Note
    nSLEEP DRVOFF  ASCIN
    L L L Sleep  
    H L L Normal  
    L H L Sleep  
    H H L Hi-z mode/coast LS and HS constant off/HI-Z all FETs
    L L H Sleep  
    H L H Brake mode LS or HS LS or HS constant on
    L H H Sleep  
    H H H HI-Z mode/coast LS and HS constant off/HI-Z all FETs

    You are correct. Just added a few details/clarification.

    Best,
    Akshay