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DRV8334-Q1: Gate driver status fault occurred

Part Number: DRV8334-Q1
Other Parts Discussed in Thread: TMS320F2800156-Q1, DRV8334,

Tool/software:

1) Fault occurrence in SPI communication
2) FAULT bit 1, SDO B31bit 1 of IC_STAT1 register (0x00h) when reading status register
3) No flag occurred when reading other status registers
4) The bit corresponding to Reserved in IC_STAT6 is set to 1

Q. Why is the reserved bit set to 1?  Please tell me how to solve this.

MCU : TMS320F2800156-Q1

MCU SPI option 

  • Hello,

    For DRV8334-Q1 please refer to the registers located in the DRV8334 non Q1 datasheet

    https://www.ti.com/lit/ds/symlink/drv8334.pdf?ts=1751061129904

    please make sure this bit is set according to the power supply for SDO

    Let me know if you need any additional help

    Regards,

    Yara

  • Thank you for your answer.

    However, what you suggested is what I have already confirmed.

    SDO is set to 3.3V according to the MCU specifications.

    What I am wondering is why the 'reserved' bit of IC_STAT6 is 1.

    Does this bit indicate a status other than 'reserved'?

    So DRV-8334 Q1 datasheet does not have MON_CTRL5.

    Why do I need to refer to non Q1 datasheet?

    Thank you

  • Hello,

    Apologies for the confusion

    So DRV-8334 Q1 datasheet does not have MON_CTRL5.

    Why do I need to refer to non Q1 datasheet?

    The Q1 datasheet is missing some of the registers (this is an error we are working to fix but shouldn't change the functionality of the device) while the non Q1 datasheet has all the correct registers included so for anything regarding SPI registers please refer to the non Q1 datasheet.

    Can you provide what is being written to the IC_CTRL2 register?

    Regards,

    Yara