Tool/software:
Hello team,
In my application due to HV supply current limit we have put resistor between PVDD diode and VREG to limit inrush current.
In the datasheet it is mentioned as VREG Switch will be normally closed.
So, during power up condition will the capacitor be charged from VREG switch? (because VVREG_THRS1 is 1.7V to 2.3V and excessive forward drop occurs only when PVDD is greater than at least 2.3V)
Thank you,