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DRV8962: Slow decay versus fast decay

Mark Compton
Prodigy 10 points
Part Number: DRV8962

Tool/software:

Hi, 

*Not necessarily for "motor drivers forum" but this option is forced.*

Question on your datasheet for the DRV8962DDVR. Section 7.4, it talks about fast decay and slow decay modes. It mentions in fast decay mode, the output is off and current recirculates through the body diodes and for slow decay mode, the low side FET is turned on and it actively shorts the output. Is the definition of these switched or is this correct? Wouldn't it be fastest to short the output. 

Additionally, is my following understanding correct?

The chip can be used as an all on/off open/drain output (high side FET disabled), all on/off open/source output (low side FET disabled), or the PWM mode where the high and low side FET alternate turning on and off? Choosing one of these 3 modes is based on the In/En/etc. settings? Is this correct that it can operate in any of these modes? 

Thanks,

Mark

  • 0
    TI__Mastermind 44325 points

    Hi Mark,

    Thanks for your question.

    Mark Compton said:
    Question on your datasheet for the DRV8962DDVR. Section 7.4, it talks about fast decay and slow decay modes. It mentions in fast decay mode, the output is off and current recirculates through the body diodes and for slow decay mode, the low side FET is turned on and it actively shorts the output. Is the definition of these switched or is this correct? Wouldn't it be fastest to short the output. 

    The use of the term "fast decay" in context with a BDC motor driving is different from the context of driving a stepper motor or a solenoid load. With a BDC motor "fast decay" is while the motor coasts. I prefer the term "coasting" for describing this drive condition, this eliminates ambiguity. The "coast" decay is faster than slow decay, depending on the motor it could be slightly faster or significantly faster. See below capture with a 48 V BDC motor and a DRV8962EVM. The reference white current waveform was with EN1 as PWM input 50 % duty cycle and IN1 = 1. The blue current waveform was with IN1 as PWM input 50 % duty cycle and EN1 = 1. You can see the downward slope of the current decay in the white trace is slightly faster. For BDC motor speed regulation slow decay is recommended. Coast mode / fast decay is not recommended. For some BDC motors, speed regulation does not work as intended with coast during PWM off.   

    The definition in the datasheet is correct. 

    In a true sense the term "fast decay" is associated with bridge direction reversal for a short duration to decay the coil current rapidly and then continue with the "slow decay" which means the recirculation current flows via the two LS-FETs (or the two HS-FETs) depending on how a full-bridge is configured. This scheme is most commonly used with stepper motors for constant coil current regulation within a short period of time or with a solenoid for a rapid decay of its magnetic field. 

    Mark Compton said:
    The chip can be used as an all on/off open/drain output (high side FET disabled), all on/off open/source output (low side FET disabled), or the PWM mode where the high and low side FET alternate turning on and off? Choosing one of these 3 modes is based on the In/En/etc. settings? Is this correct that it can operate in any of these modes? 

    Yes, you can look at the control logic this way.

    When ENx = 0 both HS-FET and LS-FET are off rendering OUTx HiZ. When ENx =1, INx input would allow alternate on/off of the HS and LS FETs. While INx is driven with a PWM the output FETs alternate on and off. While ENx is driven with a PWM you could have output switching between HS-FET on and HiZ with an open source output when INx = 1 or have output switching between LS-FET on and HiZ with an open drain output when INx = 0. Thank you.

    Regards, Murugavel    

  • 0 in reply to Murugavel4637
    Prodigy 10 points

    Hi Murugavel, 

    Thank you for the reply. I'm following most of what you said (this makes more sense when using 2 channels to make a full H bridge to control a motor and being able to reverse the polarity on the load) but still slightly confused so let me ask this:

    In the case where I am just using a single channel as a half H bridge and controlling a solenoid with PWM like the following:

    If i want the low side FET to be turned on during the "off" cycle to allow the recirculation current to not have to flow back through the body diode of the low side FET then that would be using the "slow decay" mode defined in section 7.4, correct? There may or may not be a separate flyback diode in parallel with the solenoid. 

    Thanks,

    Mark

  • +1 in reply to Mark Compton
    TI__Mastermind 44325 points

    Hi Mark,

    Mark Compton said:
    If i want the low side FET to be turned on during the "off" cycle to allow the recirculation current to not have to flow back through the body diode of the low side FET then that would be using the "slow decay" mode defined in section 7.4, correct? There may or may not be a separate flyback diode in parallel with the solenoid. 

    Yes, this is correct. You want to use INx as PWM input, ENx = 1 just so during PWM input off time the LS-FET is turned on and provide a low impedance path for the recirculation current. There will be a very small gap though. There will be a dead time of 300 ns to avoid shoot through current damage of the FETs during transition between HS_FET off and LS-FET on. During this 300 ns, the recirculation current path would be via the body diode of the LS-FET or an external flyback diode if it had lower VF compared to the body diode, such as a Schottky diode - sometimes these are integrated with the solenoid itself.  

    Regards, Murugavel