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DRV8714-Q1: Regarding leakage when power is off

Part Number: DRV8714-Q1

Tool/software:

Hello team.

I would like to know what the path will be when 5V is applied to the NSLEEP/DRVOFF/NSCS terminals while PVDD and DVDD are open.

As ECU of the failure mode check, we check the behavior of the IC when the power supply is in an open state.

When we reproduced the situation where the MCU did not notice that the pre-driver power supply was open and supplied 5V to NSLEEP/DRVOFF/NSCS, we confirmed that voltage was leaking into the following terminals.

 ・SDO:1.6V

 ・DVDD:1.2V

Could you please answer the following two questions?
 1. What path does voltage take to appear on the DVDD and SDO pins?
 2. What causes a voltage difference between the DVDD and SDO pins?

Best regards,

Saito

  • Hi,

    Thank you for your questions. 

    First of all, if you apply some voltage on SDO pin while DVDD=0V, it is violating abs max SPEC. Strickly speaking, it will have the risk you are damaging device.

    "DVDD+0.3V" is abs max SPEC.

    SDO pin has the path to DVDD which is diode path. We cannot specify how much voltage drop happens, but more than 0.3V will violate abs max.

    regards

    Shinya 

  • Shinya-san

    Thank you for your reply.

    I understand that SDO has a diode path and that sneak current is occurring to DVDD.
    I have two additional questions.

    -- Are there any other terminals other than SDO that have a similar diode path to DVDD? If so, which terminals are these?
    - If a voltage exceeding the rated voltage is applied to a terminal, can failure be avoided by reducing the current? If so, to what extent should the current be reduced?

    Best regards,

    Saito

  • Hi,

    Thank you for your questions. We will review your questions and feedback to you.

    regareds

    Shinya