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DRV81004-Q1: SPI control PWM

Frank QIN
Expert 8870 points
Part Number: DRV81004-Q1

Tool/software:

Hi Team,

We are developing DRV81004 to drive relay, and we want to use the SPI for PWM, not using the IN pin for PWM input to save MCU resources.

The problem is, the minimum control cycle for software is 10ms, so that we cannot meet the 100Hz PWM driving and duty cycle controllable requirement.

I would like to confirm, is there no PWM generator inside the device? Is there possible to use SPI generate a higher frequency and accurate PWM?

Regards,

Frank

  • 0
    TI__Mastermind 18365 points

    Hi Frank,

    The DRV81004-Q1 doesn't have integrated PWM generator, but the auto configurable variants do as well as the HS variants do. I can't think of a way with SPI.

    How many relays are they driving?

    Are they doing some sort of current regulation?

    Let me check with marketing if there are any other parts.

    Best,

    Keerthi

  • 0 in reply to Keerthivasan Kumanan
    TI__Expert 8870 points

    Hi Keerthi,

    There are three loads need to be drive, we have connected on OUT1, OUT2 and OUT3. 

    The OUT1 and OUT2 need to be drive during active mode, which need PWM. So I suggesting them to use IN0 and IN1 with PWM from MCU to drive OUT1 and OUT2. No need to output during limp home.

    The OUT3 need can be enable during the limp home mode. Which means, when there is condition (nSLEEP toggle low) letting device enter the limp home mode, the OUT3 need to be enable, which need to drive a light.

    My question now is:

    1. When nSLEEP low, and device turns into limp home mode, will the limp home IN1 map to OUT3 immediately?

    2. What is the delay time between enter limp home and OUT can output with limp home(IN1)?

    3. What is the priority between INx and register/SPI at limp home mode? Are then OR relationship?

    Regards,

    Frank

  • 0 in reply to Frank QIN
    TI__Mastermind 18365 points

    Hi Frank,

    Let me review these questions and get back to you tomorrow.

    Best,

    Keerthi

  • 0 in reply to Keerthivasan Kumanan
    TI__Mastermind 18365 points

    1. When nSLEEP low, and device turns into limp home mode, will the limp home IN1 map to OUT3 immediately?

    • Yes in limp home mode, IN1 gets mapped to Channel 3 (default)

    2. What is the delay time between enter limp home and OUT can output with limp home(IN1)?

    • Is there a requirement that they are trying to meet?
    • Once in limp home, they will be able to output there is no additional time

    3. What is the priority between INx and register/SPI at limp home mode? Are then OR relationship

    • SPI is read only in limp home
    • Please see table summarizing operation modes:

    Best,

    Keerthi