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DRV8908-Q1: DRV8908-Q1 Outputs Not Switching High via SPI Control

tharun chiningi
Prodigy 10 points
Part Number: DRV8908-Q1

Tool/software:

Hello TI Team,

I am working with the DRV8908-Q1 and communicating via SPI from a MCU. I am able to:

  • Successfully read the IC_ID register

  • Read fault registers (faults are being reported correctly)

But the issue is that I cannot get the outputs to go high.

My SPI configuration

  • Frequency: 1 MHz

  • Mode: Mode 1 (CPOL = 0, CPHA = 1)

  • Bit order: MSB first

  • nCS is toggled manually with GPIO 

  • 16-bit frames (two bytes per transaction)

Even after the above sequence, the outputs remain low/Hi-Z. I have verified SPI timing and I am receiving valid responses on MISO (IC_ID, faults, status). But writing to control registers (like 0x08, 0x09) does not turn outputs high and I am disabling Open-Load Detect (OLD) in the register.

  • 0
    TI__Mastermind 23820 points

    Hi Tharun,

    Can you check if the following configuration works, do not write to any other register for this configuration to work other than the ones listed:

    1. VM = >4.5V so it is not hitting UVLO
    2. nSLEEP = high
    3. wait 1ms for twake
    4. write 0xFF to address 0x1F to disable all OLD
    5. write 0x0A to address 0x08 to enable HS of OUT1 and OUT2
    6. write 0x01 to address 0x7 to clear any faults that may be present

    This should enable the high side FET of both OUT1 and OUT2. 

    Regards,

    Joshua