Other Parts Discussed in Thread: DRV8262
Tool/software:
Hello,
According to this thread, the DRV8256 family does not require an nSLEEP reset pulse.
Could you clarify whether this also applies after OCP and OTSD? Specifically:
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Does the device automatically recover from these fault conditions?
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If not, is there a recommended low-cost auto-reset circuit that does not require a µC?
I would also like more details about the RθJA value provided in the datasheet. Was this derived from a device in free air, or from testing on a specific PCB? If the latter, could you describe the properties of that PCB?
Additionally, do the listed IVM (and therefore PQ, quiescent supply current dissipation) values include the heat generated by the DVDD regulator circuit?
My application requires a simple and inexpensive circuit to control up to 4.2 A at 48 VDC, with current limiting based on both high- and low-side current sensing. If you have alternative device or circuit recommendations for this requirement, I would be very interested.
Best regards,
Moritz