• State
  • Locked Locked
  • Replies 6 replies
  • Subscribers 30 subscribers
  • Views 1321 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DRV8432 CBC current limit latching

Michael McKay
Prodigy 30 points

Hi,

I think we are having a similar problem as reported in the post "DRV8432DKD cycle-by-cycle current limit" but I'm not sure why.  We are using a DRV8432 in Dual full bridge mode.  With the following: PWM frequency 1660Hz, 1uF bootstrap capacitors, 27kOhm OC-Adjust resistor value is 27K (9.7A OC limit), the DRV8432 is in CBC current limiting mode (all mode pins are held low) and we have a 4uH inductor between each output of the DRV8432 and the motor connection.

The system works fine at low loads and higher resistive loads but when we drive a dc brush motor at a modest current of ~2A we seem to run into CBC current limiting when we drive the motor at higher speeds or attempt to stop the motor.  The DRV8432 stays in the CBC current limiting until we reverse the motor direction.

Our A and B PWM signals are linked, based upon the required speed and direction so it is not really possible to pulse one for a short time.  Also with our OC limit set so much higher than the drive current I am unsure at why this is happening.  We have checked the VDD it is staying at 24V, we even added another 2200uF of capacitance to the power supply circuit, which made no difference.

I would appreciate any thoughts anyone may have

Michael.

  • 0
    TI__Guru 55615 points

    Michael,

    Are you using a current probe to measure the current?  If so, are you capturing any spikes in the current that would explain why you are going into a CBC mode?

    Are you holding one of the inputs LOW while PWM'ing the other input?  I suspect this is what you are doing since the output getting "stuck" in CBC should be associated with the input held low.  

  • 0 in reply to Ryan Kehr
    Prodigy 30 points

    Ryan,

    Yes we are holding one input low while PWM'ing the other.  Is this not what we should be doing?  We don't have a current probe

    Michael

  • 0 in reply to Ryan Kehr
    Prodigy 30 points

    Hi, Ryan.

    I need the information.

    1. What are recommendations about DRV8432 switching losses calculations as functions of PWM frequency?

    2. electrical current calculation VDD, GVDD as function of PWM freq? Losses?

    3. Bootstrap capacitors calc vs. freq (50-500Hz)?

    4. Rth DRV8432 0.9 degC/W for each channel or for whole device?

    5. What is a weight of device?

    6. What is recommended mechanical force and points to press for decreasing of the thermal resistance?

    Do you have the answers?

  • 0 in reply to Igor Tishkov
    TI__Guru 55615 points

    Igor,

    1)  I have attached a spreadsheet that you can use to calculate switching losses and power losses on the internal FETs

    2)  GVDD current is specified in the datasheet and will not vary much with PWM freq.  VDD current also will not vary.  However, you need to size your 12V supply appropriately for the temperature and output current range you are designing for:  The total supply current is low at room temp (less than 50mA), but the current could increase significantly when the device temperature increases (e.g. above 125°C), especially at heavy load conditions due to substrate current collection by 12V guard rings. So it is recommended to design the 12V power supply with current capability at least 5-10% of your load current and no less than 100mA to assure the device performance across all temperature range.

    3)  Please see note in the datasheet on page 11.  For 800Hz, we recommend 1uF and also recommend a series limiting 5 ohm resistor between the BS cap and pin.  Supporting switching frequencies down to 50Hz is really not recommended for this device.  I would try to keep the switching frequency up closer to 1kHz.

    4)  This is specified for the whole device.

    5)  I am not sure and have been unable to locate this information in our packaging databases.  If this is critical for you, I can pull in some additional help.

    6)  100 Newtons is recommended (200 Newtons is the maximum recommended).  Pressure point would be as close to possible to the exposed pad area of the device.  As make sure to follow the recommendations in the datasheet on the thermal grease.

    6114.DRV84xx_Thermal Worksheet.xls

  • 0 in reply to Ryan Kehr
    Prodigy 30 points

    Hello, Ryan.

    Thanks.

    1. What may be number for brushed application? HS MOS 95% Duty cycle and LS MOS 5% DutY cycle.

    % of comm. cycle switching 5 66% is the maximum in sine mode ---> not valid for brushed applications
    % of comm. cycle low/high 95 (balance of 100% cycle)

     

    2. I think that GVDD currents are vary because these are currents of gate drivers. What you think? See link for losses and C_bootsrap. Is it correct? Do you have anything identical?

    http://www.irf.com/technical-info/appnotes/an-978.pdf

    3.  How to calculate the rising\falling time with inductive load and different currents?

    nS

    14

    Resistive load, IO = 5 A

    Output rise time

    tR

    nS

    14

    Resistive load, IO = 5 A

    Output fall time

    tF

  • 0 in reply to Igor Tishkov
    TI__Guru 55615 points

    Igor,

    1)  It depends on your application, but typically in a brushed motor you would hold one side of the bridge high or low (depending on direction) and PWM the other side for speed control.  In this case, you would only have switching losses in one of the half-bridges.  

    2)  We specify the gate current at 400kHz in the datasheet which is basically worst case.  I don't have a plot for <400kHz, but current will decrease with frequency by the linear approximation of  I = C (gate charge) x dv / dt (switching frequency).  I made the statement before of it won't "vary much" as this is a nominal piece of the power loss equation.

    3)  For an ideal inductor, the rise and fall time will be unaltered for an inductive load.  Any parasitic capacitance will, of course, alter the times.  This is really something that needs to be characterized with the real load of your system if you need a more precise number.  For the purpose of 1st order power loss calculations, the numbers given in the table will get you close enough.