How to drive a 3 phases AC motor with DRV8312 ? HELP

Matthieu,

With the DRV8332, it is only necessary to have 3 PWM signals from your microprocessor for sinusoidal control.  The outputs follow the inputs.

If the input is HIGH, the high-side transistor for the corresponding output will turn ON.  If the input is LOW, the high-side will transition OFF and the low-side will transition to the ON state.  Dead time is taken care of internally and specified in the datasheet.  

RESET will HIZ the output....both FETs are turned off for the half-bridge.

Hello Ryan;

In the datasheet of DRV8332, http://www.ti.com/lit/ds/symlink/drv8332.pdf page 13,  it says

In six step trapezoidal complementary control scheme, ahalf bridge with larger than 50% duty cycle will have a positive current and a half bridge with less than 50%  duty cycle will have a negative current. For normal operation, changing PWM duty cycle from 50% to 100% will adjust the current from 0 to maximum value with six steps control.

I have the following questions;

1. Are above lines describes the 'complementary control scheme'?

2. What causes it, is the application of a complemantary pwm signal to the phase that acts as the return phase?

3. Is the 'PWM=75%' illustration given In Figure 11, illustration of 'complementary control scheme' ?

4. For regular control,(not being complementart) your below post is valid and to adjust current from 0% to 100% the duty cycle must be adjusted from 0% to 100%?  

Thank you and best regards.

Ryan Kehr said:

Matthieu,

With the DRV8332, it is only necessary to have 3 PWM signals from your microprocessor for sinusoidal control.  The outputs follow the inputs.

If the input is HIGH, the high-side transistor for the corresponding output will turn ON.  If the input is LOW, the high-side will transition OFF and the low-side will transition to the ON state.  Dead time is taken care of internally and specified in the datasheet.  

RESET will HIZ the output....both FETs are turned off for the half-bridge.

Matthieu,

 0474.complimentaryPWM.ppt

The answer to your question 1, 3 and 4 is “yes”.

 Answer to question 2,“what causes it”: It happens because of inherent nature of complimentary PWM. In complimentary PWM scheme, each half bridge PWM signal is complementary to each other. As Ryan mentioned in his post, PWM logic of DRV8332 half-bridge is such that when PWM input is high, Top switch is on and when PWM input is low, bottom switch is on (of-course with small dead-time between Top and Bottom, which is taken care internally to device).

 Refer to attached figure and consider load connected across two half bridge of DRV8332, Now if you apply, 50% duty cycle complimentary PWM to two half bridges, this means that for 50% of time, Switch 1 and 4 are on and load voltage is +VM and another 50% if time switch 3 and 2 are on and load voltage is -VM and due to this at 50% duty cycle effective average voltage applied to load is zero. Now extend the same logic to 75% duty cycle, for 75% of time 1 and 4 would be on and 25% of time, 3 and 2 would be on, and effective average voltage across load would be VM/2.  Therefore it is said that for normal operation, changing PWM duty cycle from 50% to 100% will adjust the current from 0 to maximum value with six steps control.

 Best Regards

Milan- Motor Application Team