DRV8843 pwm delay problem

Adi,

If I understand you correctly, you are using the 28035 for PWM input and current control.  If that is the case, did you disable the current control in the driver?  I just want to rule this out as the cause of your problem.  You can disable current control as follows:

If the current regulation feature is not needed, it can be disabled by connecting the xISENSE pins directly to ground and connecting the xVREF pins to V3P3.  Also, you can directly connect the ISENA and ISENB pins to GND.

Hi, thanks for the reply.
We are using current sensing but it is done in the DSP, we need the ISENA and ISENB conected to the sence resistors for that. 

 The AVREF nad BVERF are set very hight just as current protection feauture.

Generaly is this delay time expected or is it something in the way we are using the chip?

i have done testing on demo board and i am getting the same results.

Hi Adi,

On DRV8843, both H Bridges have a small delay. The idea behind this is that if both H Bridges are enabled at the same time, they will both sink current from the power supply at the same time. To minimize the effects of GND bouncing, the ENABLE signals were staggered in sequence through the usage of the aforementioned delay.

Hope the info helps. Best regards,

Jose Quinones

Hi
This happens not just on enable but on every PWM switch.
This delay causes me to reduce maximum duty cycle to only 84% on 16 Khz pwm freq.
Losing 16% of the available DC bus voltage is very significant....

Adi,

Yes, it will happen on every ENABLE input actuation. Now this is DRV8843, so we are dealing here with INx interface. Either way, in order to protect the system for too large a current going in at H Bridges Enablement, both H Bridges can not be brought to start conduction at the same time.

I think the problem  you are observing is because you have the two PWM outputs synchronized to start at the same time and then culminate at the end of the respective duty cycle period, right? What you can do is configure the PWM to deal with the disablement at the same time (for which there is no delay protection) and then PWM the "enablement" of the device.

For example, if AIN2 is LO, you would be applying your PWM at AIN1 with a positive pulse duty cycle. I would set my timers to start the PWM duty cycle by clearing the output and the culminate the duty cycle period by setting the output. If I am thinking this correctly, you will also need to use a duty cycle which is equal to (1 - PWMMAX) so that you get the right positive polarity pulse. So you will need to use an inverted PWM, but you will not be inverting polarity, just the actuation order. With this method, you should be able to get all the available duty cycles at your respective frequency.

Another option is to just add a delay into the PHASE B duty cycle to remove the H Bridge's response latency.

Hope the info helps. Best regards,

Jose Quinones

I am not running both brigdes simulatniastly, there is an 90 deg offset betwine them so when one is at maximum other is at 50%. the PWMs are sincronized but they are center aliend.

This happens even if one phase is compleatly off. 
it happens with the motor compleatly disconected too.

here are some pictures to demonstrate the problem:
https://picasaweb.google.com/104320670484022208347/DRV8834Problem 

Hi Adi,

I was not able to see the picture for some reason. Could you send to jquinones@ti.com? I believe I know what I am going to see, but it does not hurt to double check.

The delay is based on the inputs, so it will not matter whether the motor is connected or not.

Since PHASE B will have the delay, can you try putting an offset into the PWM Duty cycle to counteract this delay?

Best regards,

Jose Quinones

Ok i have sent it to you