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DRV8432 - Problems With PWM

Problem with PWM: Why won’t it go above 95%?

I’m working on a motor control circuit using the At32UC3B0256 and a Texas Instrument DRV8432.  I’m currently having trouble getting a steady PWM signal above 95% duty cycle.  I’m not sure if the problem lies in the software or hardware.

I’ve attached a schematic for the hardware.  

I have a few ideas of where the problem might be: 

-          I’m not sure if you can run a PWM line straight from a microcontroller to the DRV.  Is it possible the line is latching?  Right now, this design has a direct line from the microcontroller to the motor controller driver.

- Is the hardware around the DRV8432 correctly placed?

Thanks for your help!  

3286.Motor Controller Schematic.sch

  • The problem I am experiencing is that at 100% duty cycle PWM, I'm seeing the motor start, run to full power, then the power comes off, and then the power goes back on, speeding up and slowing down quite erratically.  It looks like the PWM line is indeed clean.

    Upon further experimentation, I've found that when some load (even just a little friction from my hand) the motor runs very smoothly.  

    Could this be a problem with the capacitors i have installed?

  • Hi John,

    DRV8432 requires a continuous frequency to maintain the bootstrap capacitors charged. This is why as you approach the 100% duty cycle, the high side FETs cannot turn on and the H Bridge collapses. On designs of this sort, you need to make sure your target full speed can be attained with a lower than 100% duty cycle.

    Hope the info helps. Best regards,

    Jose Quinones

  • Jose,

    Thanks.  As a followup, should I be able to see a smooth run on a 99% duty cycle?  

    Thank you again!

    John

  • Hi John,

    It will depend on the PWM frequency, the bootstrap cap and the loading. I would read into the Bootstrap Capacitor Under Voltage Protection on page 11 of the datasheet as it contains some useful information on how to select the cap, and the role the frequency plays. If you have 50 ns worth of low side FET enablement on a per PWM cycle basis (if at 10 KHz or higher), you should be fine. You can also increase the bootstrap cap size if the frequency is lower.

    Best regards,

    Jose Quinones