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Fault conditions in DRV8821

Other Parts Discussed in Thread: DRV8821, DRV8824
For our application, we are driving two stepper motors.  The DRV8821 looks like a good solution.  However, I have two questions about how fault conditions ( Undervoltage, Overtemperature, and Overcurrent) are handled compared to similar single-channel drivers such as the DRV8824.

1) How can it be determined if a fault has occurred?  In the DRV8824, there is an nFault signal that indicates if a fault has occurred.  Is there an easily monitored side-effect that a microcontroller can use to determine that a fault has occurred such as V3P3 going low?

2) Is the DRV8821 datasheet correct in saying that the only way to clear any of the faults mentioned above is to remove power from the chip (Vm -> 0)?  The single channel chips can be reset by either setting the enable or reset pin low, which is a much easier interface solution than switching the higher motor voltage.
  • Kevin,

    1)  Unfortunately, I don't know of any easily monitored pins that will tell you a fault has occurred.  The V3p3 pin will remain high under the fault conditions. 

    2)  For undervoltage and temperature faults, these are automatically recovered when the voltage comes back into range or temperature drops to a normal range.  It is not necessary to cycle power for these faults.  For the more series latched over-current fault, it is necessary to cycle the power to clear this fault.  Not ideal, I understand, but this fault really should only occur if a REAL short condition exists on the outputs. 

     

  • Ryan,

    Thanks for the reply.  Your comments are making me lean towards using two single-channel drivers that have a fault pin.

    One outstanding question I have relates to the over-temperature fault.  You state that the chip automatically recovers after the temperature drops.  However, the datasheet says:

    The device will remain disabled until the die temperature has fallen to a safe level. After the temperature has
    fallen, the device may be re-enabled upon the removal and re-application of power at the VM pin.

    This seems to be in conflict with your comment.  Can you clarify if the datasheet is wrong or you were mistaken?

    Thanks.

  • Kevin,

    The datasheet certainly seems to be conflicted on this issue.  I will double check and get back to you.

     

  • Kevin,

    Unfortunately, the thermal fault is indeed LATCHED and a power cycle is required to clear it.  Not ideal, I understand.

    This will probably definately lead you down the path of single drivers.

     

  • Thanks for clarifying this.