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DRV8332 Fault and peak current capability

Pavel Ruban
Intellectual 275 points
Other Parts Discussed in Thread: DRV8332

Hello,

I’am testing current capability of the DRV8332 driver. I use a current step of 10A, where I measure how long the motor driver is capable of handling peak current before going into a limiting mode.

In the test the motor stands still, so only 2 FETs conduct during on-time, where I use synchronous rectification for the other 2 FETs. I have a small duty period of only 10%, so there are only 2 FETs conducting most of the time (90% of the period).

This of course, gives a worse thermal resistance compared to a commutating motor, where the power is dissipated between all the transistors.

From the datasheet, I can see the thermal resistance of junction-case is rated to 0.9 K/W. I can see there is an assumption that all FETs are conducting, which is the case for average power of a commutating motor. (perhaps the j-c thermal resistance should be specified more clearer in the datasheet?)Refer to this thread:

http://e2e.ti.com/support/applications/motor_drivers/f/38/t/162239.aspx

Now in my case I have only two FETS conducting, this will give me an approximation of a j-c thermal resistance of 3 K/W (6 K/W for one FET).

In my case the DRV8332 can handle a 10A current for period of around 7ms, before going in Cycle-by-Cycle current limiting mode. Is this normal for this motor driver? I would expect a thermal shut-down, but I receive a FAULT instead. I use a 19.6k resistor for oc_adj, which will give a higer peak current limiting value.

Thank you in advance,

Pavel

  • 0
    Intellectual 275 points

    Also, do you have any thermal capacitance data of the DRV8332 package?

  • 0
    TI__Guru 55615 points

    Pavel,

    A schematic would really help or you can answer my few questions below:

    1)  What are your MODE pins set to?  I can assume that you are in M3=1 and M2=M1 = 0 since you mention cycle-by-cycle current limit, but I want to verify.

    2)  What are the specifications of your heat sink?  How have you attached the heat sink to the DRV8332?  A high thermally conductive paste should be used and the heat sink must be tightly clamped to the device.

    3)  Is the /OTW pin cycling LOW when the /FAULT pin does LOW?  This would tell me if it is truly a thermal shutdown or not. 

    4)  If you are using the cycle-by-cycle mode, then NO actitvity should occur on the /FAULT pin unless your current is hitting a secondary level of protection which is approximately 6A greater than the limit set by the OC_ADJ resistor.  In other words, you might have peak currents much greater than 10A in your system.

  • 0 in reply to Ryan Kehr
    TI__Guru 55615 points

    Pavel,

    Sorry....just saw your second post on the request for thermal capacitance.

    This device is NOT meant to be used without a heat sink, so specifying thermal capacitance at a device level is not something we characterize. 

     

  • 0 in reply to Ryan Kehr
    Intellectual 275 points

    Hello Ryan,

    I have set my Mode pins for cycle-by-cycle current limiting.

    I have a heatsink attached to the motor driver which is around 3 K/W, but the heatsink size is not critical here, because my applied peak current is very short, only 7ms. (the heatsink thermal time constant is too slow for this).

    Only my FAULT pin goes low, where my OTW stays high, and this is why I'am so concerned, because my current is below the oc_adj level. So there must be some other reason for a FAULT? Any suggestions on how to track this error?

    Regards,

    Pavel

  • 0 in reply to Pavel Ruban
    Intellectual 275 points

    Hello Ryan,

    I have made some measurements of the switching current in the DRV8332. Before, I refered to my motor phase current as the peak current, but the switching current in DRV8332 turned out to be much higher than the output current.

    In these measurements, I have used an OC latching shutdown mode with a 22.6kOhm oc_adj resistor. I recirculate the current in the lower FETs (slow-deacy mode).

    Ch2=FAULT signal

    Ch3=Motor phase current, 10mV=2A

    Ch4= Current through low-side FET (ac-coupled), 200mV=1A.Conducting during the PWM off-period.

    The measurement of Ch4 shows the low-side FET been switched on to reciruclate the current. This is when the OC shutdown occurs.

    From the measurement it is clear, that the switching peak current is around 3A higher than the motor phase current of 8A.

    This is quiet a shame, as I was hoping to be able to use the DRV8332 with a 11A peak motor phase current capability. It seems to me that it is not possible to reduce this switching peak current, but I would still like to know if it is normal to have such a high switching peak current in the device?

    Zoom:

  • 0 in reply to Pavel Ruban
    TI__Guru 55615 points

    Pavel,

    A 3.3ohm and 10nF capacitor from each output to GND will slow down the fast rising edges.  The edges are very fast on this device. 

    You could also try cycle-by-cycle mode to avoid the hard trip.

     

  • 0 in reply to Ryan Kehr
    Intellectual 275 points

    Hello Ryan,

    I found out that the peak current oscillation was caused due to a high capacitor value of (10uF) in parrallel with the sense resistor. I removed this capacitor and added a snubber between the motor phase and ground.

    I have made new measurements, now the oscillation is removed, but the motor driver still goes into a FAULT mode at only around 8.5A phase current. Now I cant really see that I have an over current in the system during the shutdown. So what is causing it?

    Ch1: FAULT

    Ch2: Motor Phase Voltage

    Ch3: Motor Phase current (10mV=2A)

    Ch4: Sense Current, lower FET (200mV=1A)

    This measurement shows the transition when the lower FETs start to conduct during the current recirculation period.

    This measurement shows the start of the on-period: