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DRV8301 Gate driver loading Qg(TOT)

Derek King1
Intellectual 365 points
Other Parts Discussed in Thread: DRV8301

The datasheet for the DRV8301 states the gate driver "Support up to 200kHz switching frequency with Qg(TOT)=25nC or total 30mA gate drive average current".

In this statement, what is Qg(TOT)? 

1. The Qg for a single FET?  At 200kHz each highside and lowside FET can have a Qg of 25nC.

2. The sum of the Qg for all highside FETs, but not the lowside FETs?   I could have 3 highside FETs, each with a Qg of ~8nC.  If  I only wanted an H-bridge with 2 highside FETs, each FET could have a Qg of ~12nC.

3. The sum of the Qg of all FETs (highside and lowside)?   For a full 3-phase inverter, each FET can only have a Qg or 4nC at 200kHz.

Also, how does the 25nC translate into 30mA?    

The formula I would use if 30mA was being shared between all 6 FETs :

6 * f * Cg = 6 * 200kHz * 25nC = 30mA

Is this the correct interpretation of the relationship between 30mA to 25nC? 

  • 0
    TI__Expert 8885 points

    Derek,

    Thanks for you query, Will get back to you once I investigate.

    Best Regards

    Milan -> System App- Motor Application Team

  • 0
    TI__Guru 55615 points

    Derek,

    The last part of your line of questioning is exactly correct including the formula. 

    Qg(total) is for EACH fet and the specification for this is commonly found in a FET datasheet.  If you back off on the switching frequency, you can drive some very large FETs.  Motor applications are typically at or around 30kHz for Fsw, so I am not sure why we gave the example at 200kHz in the datasheet.