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DRV2604L / Power-On-Reset

Guru 29720 points
Other Parts Discussed in Thread: DRV2604, DRV2604L
Hi team,
I'd like to ask about "Brownout Protection" in datasheet Page17.
 
1)
I understood VDD ramp-up rate around VREG=V_BOT is required to be faster than 3.6kV/s for "Brownout protection".
I recognize that the ramp-rate is also required for power-up sequence to activate Power-On-Reset(POR).
Is my understanding correct?
 
2)
There is the following description in datasheet page17.
"If the VDD ramp-up rate is slower than 3.6 kV/s, then the device can fall into an unknown state."
What happens if the device falls into "unknown state"?
Is it possible case to be not accessible I2C interface in this state?
 
Best Regards,
Yaita / Japan disty
  • Yaita-san,

    1. Yes, that is correct.  The ramp rate must be maintained for power up from shutdown and after POR events.
    2. If the ramp rate is not maintained the device may be inaccessible via I2C and require a power reset.

    Thanks,
    Brian

  • Brian-san,
     
    Thank you for your prompt reply.
    Is this requirement of ramp rate same for DRV2604(not "L" version)?
    I can't see the "Brownout Protection" in DRV2604 datasheet.
     
    Best Regards,
    Yaita
  • Yaita-san,

    Since the internal LDO is different on the DRV2604 "non-L" and the "L" versions, there is not an absolute condition that will put the device in any other states as far as supply ramp is considered. 

    Let us know if you have any questions.

    Regards,

    Gautham

  • Hi
     
    I'd like to get your advice about the following issue.
     
    It seems that a number of DRV2604L were inaccessible via I2C in my customer's final examination process, and I heard power cycling makes the device accessible.
    However, my customer has hard time to reproduce this situation(inaccessible via I2C) by bench test.
    (He tried to change ramp-up rate of VDD in many kinds, but can't reproduce this situation yet.)
    He would like to look at the effect of ramp-up rate on the device to verify the issue.
     
    Is it possible to reproduce the situation(inaccessible via I2C) intensionally?
    If yes, I'd like know the method.
    And if possible, I'd also like to know the mechanism for entering "unknown state".
     
    Your help would be really appreciated.
     
    Best regards,
    Yaita
  • Yaita-san,

    If you maintain the 3.6 kV/s ramp time then you should not see the issue.

    Not every part will enter the unknown state, but if a part can the way to prevent it is to maintain 3.6 kV/s ramp time on VDD. 

    Thanks,
    Brian