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DRV8830 I2C NACK

Brad Maibach
Prodigy 20 points
Other Parts Discussed in Thread: DRV8830

I'm attempting to interface a DRV8830 I2C driver with the I2C on an Atmel AT90CAN, but I cannot get an ACK from the slave device. I have tried two 8830's, checked the timing, checked and double checked the write address, register address, and byte sequence. The timing has been checked; clock samples fall well within high or low intervals on the SDA, other intervals exceed minimum values. Rate is 100 kHz. The input voltage has been checked. All the cases in the following document have been checked: http://www.ti.com/lit/an/scaa106/scaa106.pdf
Please see this screen cap of the logic analyzer data: http://i.imgur.com/3KNrKlY.png
Thank you for any recommendations!

  • 0
    TI__Mastermind 26065 points

    Hi Brad

    Thanks of your info. We will look at this issue and get back to you later.

    Best regards,

  • 0 in reply to Wilson Zuo
    TI__Mastermind 26065 points

    Hi Brad,

    Could you show us the hardware setting of A1 and A0 of DRV8830?

    I see your plot of the first byte is 0xC8, So it is trying to access the device with A0,A1 open.

    There may be some confusing in the datasheet that the A3-A0 is actually for the BIT4,BIT3,BIT2,BIT1 of the first address byte. So BIT7,BIT6,BIT5 are fixed as "110" and BIT0 stands for R/W.

    You can check again that whether the software command is matching the hardware address.

    Also please pay attention to the note in datasheet that :

    A master bus device must wait at least 60 μs after power is applied to VCC to generate a START condition.

    Best regards,

  • 0 in reply to Wilson Zuo
    Prodigy 20 points

    A1, A0 are set to open. One weird thing that I'm getting is the acknowledgement is received only when the pins of two DRV8830s are shorted together, and when they are both configured with their A1, A0 pins open. Removing either IC causes NAK to reappear. Also, strangely, after ACK is received in this way, reconfiguring the A1,A0 pins of either does not result in an ACK using any other address, but continues to produce ACK only for the C8 or C9 (open A1,A0) address even after power cycling.